Merge pull request #927 from jeenu-arm/state-switch

[project/bcm63xx/atf.git] / bl1 / aarch64 / bl1_context_mgmt.c

diff --git a/bl1/aarch64/bl1_context_mgmt.c b/bl1/aarch64/bl1_context_mgmt.c
index 7069ed6481d4d04ad33eee255f2fc696f3e9bba5..2c7fe0705ffa0f7fc5c7d65cfb8285fef0673c75 100644 (file)
--- a/bl1/aarch64/bl1_context_mgmt.c
+++ b/bl1/aarch64/bl1_context_mgmt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -48,8 +48,7 @@ void bl1_prepare_next_image(unsigned int image_id)
         * Ensure that the build flag to save AArch32 system registers in CPU
         * context is not set for AArch64-only platforms.
         */
-       if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT)
-                       & ID_AA64PFR0_ELX_MASK) == 0x1) {
+       if (EL_IMPLEMENTED(1) == EL_IMPL_A64ONLY) {
                ERROR("EL1 supports AArch64-only. Please set build flag "
                                "CTX_INCLUDE_AARCH32_REGS = 0");
                panic();
@@ -75,9 +74,8 @@ void bl1_prepare_next_image(unsigned int image_id)
                next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
                                   DISABLE_ALL_EXCEPTIONS);
        } else {
-               /* Use EL2 if supported else use EL1. */
-               if (read_id_aa64pfr0_el1() &
-                       (ID_AA64PFR0_ELX_MASK << ID_AA64PFR0_EL2_SHIFT)) {
+               /* Use EL2 if supported; else use EL1. */
+               if (EL_IMPLEMENTED(2)) {
                        next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
                                DISABLE_ALL_EXCEPTIONS);
                } else {