/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
-/memreserve/ 0x80000000 0x00010000;
-
-/ {
-};
-
-/ {
- model = "FVP Base";
- compatible = "arm,vfp-base", "arm,vexpress";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- chosen { };
-
- aliases {
- serial0 = &v2m_serial0;
- serial1 = &v2m_serial1;
- serial2 = &v2m_serial2;
- serial3 = &v2m_serial3;
- };
-
- psci {
- compatible = "arm,psci";
- method = "smc";
- cpu_suspend = <0xc4000001>;
- cpu_off = <0x84000002>;
- cpu_on = <0xc4000003>;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x0>;
- enable-method = "psci";
- };
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x1>;
- enable-method = "psci";
- };
- cpu@2 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x2>;
- enable-method = "psci";
- };
- cpu@3 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x3>;
- enable-method = "psci";
- };
- cpu@100 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x100>;
- enable-method = "psci";
- };
- cpu@101 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x101>;
- enable-method = "psci";
- };
- cpu@102 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x102>;
- enable-method = "psci";
- };
- cpu@103 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x103>;
- enable-method = "psci";
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0 0x80000000>,
- <0x00000008 0x80000000 0 0x80000000>;
- };
-
- gic: interrupt-controller@2f000000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interrupt-controller;
- reg = <0x0 0x2f000000 0 0x10000>, // GICD
- <0x0 0x2f100000 0 0x200000>, // GICR
- <0x0 0x2c000000 0 0x2000>, // GICC
- <0x0 0x2c010000 0 0x2000>, // GICH
- <0x0 0x2c02f000 0 0x2000>; // GICV
- interrupts = <1 9 4>;
-
- its: its@2f020000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <1 13 0xff01>,
- <1 14 0xff01>,
- <1 11 0xff01>,
- <1 10 0xff01>;
- clock-frequency = <100000000>;
- };
-
- timer@2a810000 {
- compatible = "arm,armv7-timer-mem";
- reg = <0x0 0x2a810000 0x0 0x10000>;
- clock-frequency = <100000000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- frame@2a830000 {
- frame-number = <1>;
- interrupts = <0 26 4>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
- };
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0 60 4>,
- <0 61 4>,
- <0 62 4>,
- <0 63 4>;
- };
-
- smb {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 0 0 4>,
- <0 0 1 &gic 0 0 0 1 4>,
- <0 0 2 &gic 0 0 0 2 4>,
- <0 0 3 &gic 0 0 0 3 4>,
- <0 0 4 &gic 0 0 0 4 4>,
- <0 0 5 &gic 0 0 0 5 4>,
- <0 0 6 &gic 0 0 0 6 4>,
- <0 0 7 &gic 0 0 0 7 4>,
- <0 0 8 &gic 0 0 0 8 4>,
- <0 0 9 &gic 0 0 0 9 4>,
- <0 0 10 &gic 0 0 0 10 4>,
- <0 0 11 &gic 0 0 0 11 4>,
- <0 0 12 &gic 0 0 0 12 4>,
- <0 0 13 &gic 0 0 0 13 4>,
- <0 0 14 &gic 0 0 0 14 4>,
- <0 0 15 &gic 0 0 0 15 4>,
- <0 0 16 &gic 0 0 0 16 4>,
- <0 0 17 &gic 0 0 0 17 4>,
- <0 0 18 &gic 0 0 0 18 4>,
- <0 0 19 &gic 0 0 0 19 4>,
- <0 0 20 &gic 0 0 0 20 4>,
- <0 0 21 &gic 0 0 0 21 4>,
- <0 0 22 &gic 0 0 0 22 4>,
- <0 0 23 &gic 0 0 0 23 4>,
- <0 0 24 &gic 0 0 0 24 4>,
- <0 0 25 &gic 0 0 0 25 4>,
- <0 0 26 &gic 0 0 0 26 4>,
- <0 0 27 &gic 0 0 0 27 4>,
- <0 0 28 &gic 0 0 0 28 4>,
- <0 0 29 &gic 0 0 0 29 4>,
- <0 0 30 &gic 0 0 0 30 4>,
- <0 0 31 &gic 0 0 0 31 4>,
- <0 0 32 &gic 0 0 0 32 4>,
- <0 0 33 &gic 0 0 0 33 4>,
- <0 0 34 &gic 0 0 0 34 4>,
- <0 0 35 &gic 0 0 0 35 4>,
- <0 0 36 &gic 0 0 0 36 4>,
- <0 0 37 &gic 0 0 0 37 4>,
- <0 0 38 &gic 0 0 0 38 4>,
- <0 0 39 &gic 0 0 0 39 4>,
- <0 0 40 &gic 0 0 0 40 4>,
- <0 0 41 &gic 0 0 0 41 4>,
- <0 0 42 &gic 0 0 0 42 4>;
-
- /include/ "rtsm_ve-motherboard.dtsi"
- };
-
- panels {
- panel@0 {
- compatible = "panel";
- mode = "XVGA";
- refresh = <60>;
- xres = <1024>;
- yres = <768>;
- pixclock = <15748>;
- left_margin = <152>;
- right_margin = <48>;
- upper_margin = <23>;
- lower_margin = <3>;
- hsync_len = <104>;
- vsync_len = <4>;
- sync = <0>;
- vmode = "FB_VMODE_NONINTERLACED";
- tim2 = "TIM2_BCD", "TIM2_IPC";
- cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
- caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
- bpp = <16>;
- };
- };
-};
+/include/ "fvp-base-gicv3-psci-common.dtsi"