Add Broadcom's code for bcm63xx support

[project/bcm63xx/atf.git] / fdts / rtsm_ve-motherboard-aarch32.dtsi

diff --git a/fdts/rtsm_ve-motherboard-aarch32.dtsi b/fdts/rtsm_ve-motherboard-aarch32.dtsi
index 5afbc1ee5b5f222762e628e24fdbb3696541ddb3..7a8af8e7489af339c71fdc57f03ade62890c5e92 100644 (file)
--- a/fdts/rtsm_ve-motherboard-aarch32.dtsi
+++ b/fdts/rtsm_ve-motherboard-aarch32.dtsi
@@ -57,14 +57,14 @@
                        #size-cells = <1>;
                        ranges = <0 3 0 0x200000>;
 
-                       v2m_sysreg: sysreg@010000 {
+                       v2m_sysreg: sysreg@10000 {
                                compatible = "arm,vexpress-sysreg";
                                reg = <0x010000 0x1000>;
                                gpio-controller;
                                #gpio-cells = <2>;
                        };
 
-                       v2m_sysctl: sysctl@020000 {
+                       v2m_sysctl: sysctl@20000 {
                                compatible = "arm,sp810", "arm,primecell";
                                reg = <0x020000 0x1000>;
                                clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
@@ -73,7 +73,7 @@
                                clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
                        };
 
-                       aaci@040000 {
+                       aaci@40000 {
                                compatible = "arm,pl041", "arm,primecell";
                                reg = <0x040000 0x1000>;
                                interrupts = <11>;
@@ -81,7 +81,7 @@
                                clock-names = "apb_pclk";
                        };
 
-                       mmci@050000 {
+                       mmci@50000 {
                                compatible = "arm,pl180", "arm,primecell";
                                reg = <0x050000 0x1000>;
                                interrupts = <9 10>;
@@ -93,7 +93,7 @@
                                clock-names = "mclk", "apb_pclk";
                        };
 
-                       kmi@060000 {
+                       kmi@60000 {
                                compatible = "arm,pl050", "arm,primecell";
                                reg = <0x060000 0x1000>;
                                interrupts = <12>;
@@ -101,7 +101,7 @@
                                clock-names = "KMIREFCLK", "apb_pclk";
                        };
 
-                       kmi@070000 {
+                       kmi@70000 {
                                compatible = "arm,pl050", "arm,primecell";
                                reg = <0x070000 0x1000>;
                                interrupts = <13>;
@@ -109,7 +109,7 @@
                                clock-names = "KMIREFCLK", "apb_pclk";
                        };
 
-                       v2m_serial0: uart@090000 {
+                       v2m_serial0: uart@90000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x090000 0x1000>;
                                interrupts = <5>;
@@ -117,7 +117,7 @@
                                clock-names = "uartclk", "apb_pclk";
                        };
 
-                       v2m_serial1: uart@0a0000 {
+                       v2m_serial1: uart@a0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0a0000 0x1000>;
                                interrupts = <6>;
@@ -125,7 +125,7 @@
                                clock-names = "uartclk", "apb_pclk";
                        };
 
-                       v2m_serial2: uart@0b0000 {
+                       v2m_serial2: uart@b0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0b0000 0x1000>;
                                interrupts = <7>;
@@ -133,7 +133,7 @@
                                clock-names = "uartclk", "apb_pclk";
                        };
 
-                       v2m_serial3: uart@0c0000 {
+                       v2m_serial3: uart@c0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0c0000 0x1000>;
                                interrupts = <8>;
@@ -141,7 +141,7 @@
                                clock-names = "uartclk", "apb_pclk";
                        };
 
-                       wdt@0f0000 {
+                       wdt@f0000 {
                                compatible = "arm,sp805", "arm,primecell";
                                reg = <0x0f0000 0x1000>;
                                interrupts = <0>;
@@ -184,7 +184,7 @@
                                framebuffer = <0x18000000 0x00180000>;
                        };
 
-                       virtio_block@0130000 {
+                       virtio_block@130000 {
                                compatible = "virtio,mmio";
                                reg = <0x130000 0x1000>;
                                interrupts = <0x2a>;