-commit 7cbb4c021bfd1e656f5b9953a947ab3c64e4e3b0
+commit 6fb7eefaa4d8377e6b124435059656dd6f643e91
+Author: Karl Beldan <karl.beldan@rivierawaves.com>
+Date: Tue Oct 7 15:53:38 2014 +0200
+
+ mac80211/trivial: fix typo in starting baserate for rts_cts_rate_idx
+
+ Fixes: 5253ffb8 ("mac80211: always pick a basic rate to tx RTS/CTS for pre-HT rates")
+ Signed-off-by: Karl Beldan <karl.beldan@rivierawaves.com>
+
+commit b18111d911980af52bead74ee45250cc96ad5108
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Tue Oct 7 10:14:37 2014 +0530
+
+ ath9k: Fix crash in MCC mode
+
+ When a channel context is removed, the hw_queue_base
+ is set to -1, this will result in a panic because
+ ath9k_chanctx_stop_queues() can be called on an interface
+ that is not assigned to any context yet - for example,
+ when trying to scan.
+
+ Fix this issue by setting the hw_queue_base to zero
+ when a channel context is removed.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit e2cba8d7590e76661e86f1f0987ef9f8c13c9a6d
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:20 2014 +0530
+
+ ath9k: Fix flushing in MCC mode
+
+ When we are attempting to switch to a new
+ channel context, the TX queues are flushed, but
+ the mac80211 queues are not stopped and traffic
+ can still come down to the driver.
+
+ This patch fixes it by stopping the queues
+ assigned to the current context/vif before
+ trying to flush.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 5ba8d9d2f018f2c4e23f9e68b90ca5b9d5470457
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:19 2014 +0530
+
+ ath9k: Fix queue handling for channel contexts
+
+ When a full chip reset is done, all the queues
+ across all VIFs are stopped, but if MCC is enabled,
+ only the queues of the current context is awakened,
+ when we complete the reset.
+
+ This results in unfairness for the inactive context.
+ Since frames are queued internally in the driver if
+ there is a context mismatch, we can awaken all the
+ queues when coming out of a reset.
+
+ The VIF-specific queues are still used in flow control,
+ to ensure fairness when traffic is high.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit a064eaa10ca4ec58d5a405c9a7f87efc6d2fa423
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:18 2014 +0530
+
+ ath9k: Add ath9k_chanctx_stop_queues()
+
+ This can be used when the queues of a context
+ needs to be stopped.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit b39031536aab9cb1324328cf46fa4ef940bd975f
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:17 2014 +0530
+
+ ath9k: Pass context to ath9k_chanctx_wake_queues()
+
+ Change the ath9k_chanctx_wake_queues() API so
+ that we can pass the channel context that needs its
+ queues to be stopped.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 4f82eecf73019c27537f65c160e90385e159afd8
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:16 2014 +0530
+
+ ath9k: Fix queue handling in flush()
+
+ When draining of the TX queues fails, a
+ full HW reset is done. ath_reset() makes sure
+ that the queues in mac80211 are restarted,
+ so there is no need to wake them up again.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 60913f4d2951f6410eed969aae4717c7ced37044
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:15 2014 +0530
+
+ ath9k: Remove duplicate code
+
+ ath9k_has_tx_pending() can be used to
+ check if there are pending frames instead
+ of having duplicate code.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit fc1314c75e0558c03cb434e2af2c257caa201e76
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:14 2014 +0530
+
+ ath9k: Fix pending frame check
+
+ Checking for the queue depth outside of
+ the TX queue lock is incorrect and in this
+ case, is not required since it is done inside
+ ath9k_has_pending_frames().
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit b736728575af03488388e84fceac7bf0eac5dbb6
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:13 2014 +0530
+
+ ath9k: Check pending frames properly
+
+ There is no need to check if the current
+ channel context has active ACs queued up
+ if the TX queue is not empty.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 4b60af4ab4363bd79eeba94bb6bed396cf2aaf62
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Thu Oct 2 06:33:12 2014 +0530
+
+ ath9k: Print RoC expiration
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 4d9f634b02e4240f86719f30e4c9e62f6a4c4d36
+Author: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+Date: Tue Sep 30 14:15:23 2014 +0530
+
+ ath9k: Check early for HW reset
+
+ chan_lock is not required for checking if
+ we are in the middle of a HW reset, so do it
+ early. This also removes the small window
+ where the lock is dropped and reacquired.
+
+ Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit c393d179924685d5c8c72446c5b6401f25fdb2a0
+Author: Marek Puzyniak <marek.puzyniak@tieto.com>
+Date: Tue Oct 7 17:04:30 2014 +0200
+
+ ath9k_htc: avoid kernel panic in ath9k_hw_reset
+
+ hw pointer of ath_hw is not assigned to proper value
+ in function ath9k_hw_reset what finally causes kernel panic.
+ This can be solved by proper initialization of ath_hw in
+ ath9k_init_priv.
+
+ Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
+ Acked-by: Oleksij Rempel <linux@rempel-privat.de>
+ Signed-off-by: John W. Linville <linville@tuxdriver.com>
+
+commit 065e0b64f71632f5ad7f00c102fde09c534cfbf0
+Author: Felix Fietkau <nbd@openwrt.org>
+Date: Tue Sep 30 11:00:33 2014 +0200
+
+ ath9k: fix getting tx duration for dynack
+
+ On AR9003, tx control and tx status are in separate descriptor rings.
+ Tx duration is extracted from the tx control descriptor data, which
+ ar9003_hw_proc_txdesc cannot access.
+
+ Fix getting the duration by adding a separate callback for it.
+
+ Acked-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
+ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit fdf9a4517b60d847b9bc0a30249efd96559fa450
+Author: Felix Fietkau <nbd@openwrt.org>
+Date: Tue Sep 9 09:48:30 2014 +0200
+
+ ath9k_hw: fix PLL clock initialization for newer SoC
+
+ On AR934x and newer SoC devices, the layout of the AR_RTC_PLL_CONTROL
+ register changed. This currently breaks at least 5/10 MHz operation.
+ AR933x uses the old layout.
+
+ It might also have been causing other stability issues because of the
+ different location of the PLL_BYPASS bit which needs to be set during
+ PLL clock initialization.
+
+ This patch also removes more instances of hardcoded register values in
+ favor of properly computed ones with the PLL_BYPASS bit added.
+
+ Reported-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
+ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit b6d1f51cd8bdc9d952147a960fbf1f261d8e4188
+Author: Felix Fietkau <nbd@openwrt.org>
+Date: Mon Sep 8 18:35:08 2014 +0200
+
+ ath9k_hw: reduce ANI spur immunity setting on HT40 extension channel
+
+ The cycpwr_thr1 value needs to be lower on the extension channel than on
+ the control channel, similar to how the register settings are programmed
+ in the initvals.
+
+ Also drop the unnecessary check for HT40 - this register can always be
+ written. This patch has been reported to improve HT40 stability and
+ throughput in some environments.
+
+ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit 5ad2dfbaa19aa45d29184d30c8c5dae0e110074a
Author: Felix Fietkau <nbd@openwrt.org>
-Date: Thu Apr 10 10:49:01 2014 +0200
+Date: Mon Sep 8 18:31:26 2014 +0200
- mac80211: exclude AP_VLAN interfaces from tx power calculation
+ Revert "ath9k_hw: reduce ANI firstep range for older chips"
- Their power value is initialized to zero. This patch fixes an issue
- where the configured power drops to the minimum value when AP_VLAN
- interfaces are created/removed.
+ This reverts commit 09efc56345be4146ab9fc87a55c837ed5d6ea1ab
+
+ I've received reports that this change is decreasing throughput in some
+ rare conditions on an AR9280 based device
Cc: stable@vger.kernel.org
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-commit 0ca13e26341733bf9577287fb04a3bef0d2f5cc9
+commit 4c82fc569cf2f29e6c66d98ef4a1b0f3b6a98e9d
Author: Felix Fietkau <nbd@openwrt.org>
-Date: Wed Apr 9 00:07:01 2014 +0200
+Date: Sat Sep 27 22:39:27 2014 +0200
- mac80211: suppress BSS info change notifications for AP_VLAN
+ ath9k_hw: disable hardware ad-hoc flag on ar934x rev 3
+
+ On AR934x rev 3, settin the ad-hoc flag completely messes up hardware
+ state - beacons get stuck, almost no packets make it out, hardware is
+ constantly reset.
+
+ When leaving out that flag and setting up the hw like in AP mode, TSF
+ timers won't be automatically synced, but at least the rest works.
- Fixes warnings on tx power changes
+ AR934x rev 2 and older are not affected by this bug
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-commit ec998e5991781ecdaad0911dc64f1c8d3749c308
+commit ecfb4b3fff006372ac5c40871f9bb182fd00444f
Author: Felix Fietkau <nbd@openwrt.org>
-Date: Tue Apr 8 23:42:17 2014 +0200
+Date: Sat Sep 27 22:15:43 2014 +0200
- ath9k: fix a scheduling while atomic bug in CSA handling
+ ath9k: use ah->get_mac_revision for all SoC devices if available
- Commit "ath9k: prepare for multi-interface CSA support" added a call to
- ieee80211_iterate_active_interfaces in atomic context (beacon tasklet),
- which is crashing.
- Use ieee80211_iterate_active_interfaces_atomic instead.
+ It is needed for AR934x as well
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-commit 93f310a38a1d81a4bc8fcd9bf29628bd721cf2ef
+commit c11113bc25df22898fb995d3205bdc4f27c98073
Author: Felix Fietkau <nbd@openwrt.org>
-Date: Sun Apr 6 23:35:28 2014 +0200
+Date: Sat Sep 27 18:04:58 2014 +0200
- ath9k_hw: reduce ANI firstep range for older chips
+ ath5k: add missing include for debug code
- Use 0-8 instead of 0-16, which is closer to the old implementation.
- Also drop the overwrite of the firstep_low parameter to improve
- stability.
+ Needed for calling vmalloc()/vfree()
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+commit 83f76a9f9a42773c7eef90bb86b4b2c16b0b3755
+Author: Felix Fietkau <nbd@openwrt.org>
+Date: Sat Sep 27 15:58:51 2014 +0200
+ ath5k: fix AHB kconfig dependency
+
+ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+
+commit ddd67f2a5cfd73fad4b78190025402d419b9f0a9
+Author: Felix Fietkau <nbd@openwrt.org>
+Date: Sat Sep 27 15:57:09 2014 +0200
+
+ Revert "ath5k: Remove AHB bus support"
+
+ This reverts commit 093ec3c5337434f40d77c1af06c139da3e5ba6dc.
+
+--- a/drivers/net/wireless/ath/ath5k/Kconfig
++++ b/drivers/net/wireless/ath/ath5k/Kconfig
+@@ -2,12 +2,14 @@ config ATH5K
+ tristate "Atheros 5xxx wireless cards support"
+ depends on m
+ depends on PCI && MAC80211
++ depends on (PCI || ATHEROS_AR231X) && MAC80211
+ select ATH_COMMON
+ select MAC80211_LEDS
+ select BACKPORT_LEDS_CLASS
+ select BACKPORT_NEW_LEDS
+ select BACKPORT_AVERAGE
+- select ATH5K_PCI
++ select ATH5K_AHB if ATHEROS_AR231X
++ select ATH5K_PCI if !ATHEROS_AR231X
+ ---help---
+ This module adds support for wireless adapters based on
+ Atheros 5xxx chipset.
+@@ -52,9 +54,16 @@ config ATH5K_TRACER
+
+ If unsure, say N.
+
++config ATH5K_AHB
++ bool "Atheros 5xxx AHB bus support"
++ depends on ATHEROS_AR231X
++ ---help---
++ This adds support for WiSoC type chipsets of the 5xxx Atheros
++ family.
++
+ config ATH5K_PCI
+ bool "Atheros 5xxx PCI bus support"
+- depends on PCI
++ depends on !ATHEROS_AR231X
+ ---help---
+ This adds support for PCI type chipsets of the 5xxx Atheros
+ family.
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath5k/ahb.c
+@@ -0,0 +1,234 @@
++/*
++ * Copyright (c) 2008-2009 Atheros Communications Inc.
++ * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include <linux/nl80211.h>
++#include <linux/platform_device.h>
++#include <linux/etherdevice.h>
++#include <linux/export.h>
++#include <ar231x_platform.h>
++#include "ath5k.h"
++#include "debug.h"
++#include "base.h"
++#include "reg.h"
++
++/* return bus cachesize in 4B word units */
++static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
++{
++ *csz = L1_CACHE_BYTES >> 2;
++}
++
++static bool
++ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
++{
++ struct ath5k_hw *ah = common->priv;
++ struct platform_device *pdev = to_platform_device(ah->dev);
++ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
++ u16 *eeprom, *eeprom_end;
++
++ eeprom = (u16 *) bcfg->radio;
++ eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
++
++ eeprom += off;
++ if (eeprom > eeprom_end)
++ return false;
++
++ *data = *eeprom;
++ return true;
++}
++
++int ath5k_hw_read_srev(struct ath5k_hw *ah)
++{
++ struct platform_device *pdev = to_platform_device(ah->dev);
++ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
++ ah->ah_mac_srev = bcfg->devid;
++ return 0;
++}
++
++static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
++{
++ struct platform_device *pdev = to_platform_device(ah->dev);
++ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
++ u8 *cfg_mac;
++
++ if (to_platform_device(ah->dev)->id == 0)
++ cfg_mac = bcfg->config->wlan0_mac;
++ else
++ cfg_mac = bcfg->config->wlan1_mac;
++
++ memcpy(mac, cfg_mac, ETH_ALEN);
++ return 0;
++}
++
++static const struct ath_bus_ops ath_ahb_bus_ops = {
++ .ath_bus_type = ATH_AHB,
++ .read_cachesize = ath5k_ahb_read_cachesize,
++ .eeprom_read = ath5k_ahb_eeprom_read,
++ .eeprom_read_mac = ath5k_ahb_eeprom_read_mac,
++};
++
++/*Initialization*/
++static int ath_ahb_probe(struct platform_device *pdev)
++{
++ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
++ struct ath5k_hw *ah;
++ struct ieee80211_hw *hw;
++ struct resource *res;
++ void __iomem *mem;
++ int irq;
++ int ret = 0;
++ u32 reg;
++
++ if (!dev_get_platdata(&pdev->dev)) {
++ dev_err(&pdev->dev, "no platform data specified\n");
++ ret = -EINVAL;
++ goto err_out;
++ }
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (res == NULL) {
++ dev_err(&pdev->dev, "no memory resource found\n");
++ ret = -ENXIO;
++ goto err_out;
++ }
++
++ mem = ioremap_nocache(res->start, resource_size(res));
++ if (mem == NULL) {
++ dev_err(&pdev->dev, "ioremap failed\n");
++ ret = -ENOMEM;
++ goto err_out;
++ }
++
++ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
++ if (res == NULL) {
++ dev_err(&pdev->dev, "no IRQ resource found\n");
++ ret = -ENXIO;
++ goto err_iounmap;
++ }
++
++ irq = res->start;
++
++ hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
++ if (hw == NULL) {
++ dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
++ ret = -ENOMEM;
++ goto err_iounmap;
++ }
++
++ ah = hw->priv;
++ ah->hw = hw;
++ ah->dev = &pdev->dev;
++ ah->iobase = mem;
++ ah->irq = irq;
++ ah->devid = bcfg->devid;
++
++ if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
++ /* Enable WMAC AHB arbitration */
++ reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
++ reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
++ iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
++
++ /* Enable global WMAC swapping */
++ reg = ioread32((void __iomem *) AR5K_AR2315_BYTESWAP);
++ reg |= AR5K_AR2315_BYTESWAP_WMAC;
++ iowrite32(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
++ } else {
++ /* Enable WMAC DMA access (assuming 5312 or 231x*/
++ /* TODO: check other platforms */
++ reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
++ if (to_platform_device(ah->dev)->id == 0)
++ reg |= AR5K_AR5312_ENABLE_WLAN0;
++ else
++ reg |= AR5K_AR5312_ENABLE_WLAN1;
++ iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
++
++ /*
++ * On a dual-band AR5312, the multiband radio is only
++ * used as pass-through. Disable 2 GHz support in the
++ * driver for it
++ */
++ if (to_platform_device(ah->dev)->id == 0 &&
++ (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
++ (BD_WLAN1 | BD_WLAN0))
++ ah->ah_capabilities.cap_needs_2GHz_ovr = true;
++ else
++ ah->ah_capabilities.cap_needs_2GHz_ovr = false;
++ }
++
++ ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
++ if (ret != 0) {
++ dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
++ ret = -ENODEV;
++ goto err_free_hw;
++ }
++
++ platform_set_drvdata(pdev, hw);
++
++ return 0;
++
++ err_free_hw:
++ ieee80211_free_hw(hw);
++ err_iounmap:
++ iounmap(mem);
++ err_out:
++ return ret;
++}
++
++static int ath_ahb_remove(struct platform_device *pdev)
++{
++ struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
++ struct ieee80211_hw *hw = platform_get_drvdata(pdev);
++ struct ath5k_hw *ah;
++ u32 reg;
++
++ if (!hw)
++ return 0;
++
++ ah = hw->priv;
++
++ if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
++ /* Disable WMAC AHB arbitration */
++ reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
++ reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
++ iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
++ } else {
++ /*Stop DMA access */
++ reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
++ if (to_platform_device(ah->dev)->id == 0)
++ reg &= ~AR5K_AR5312_ENABLE_WLAN0;
++ else
++ reg &= ~AR5K_AR5312_ENABLE_WLAN1;
++ iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
++ }
++
++ ath5k_deinit_ah(ah);
++ iounmap(ah->iobase);
++ ieee80211_free_hw(hw);
++
++ return 0;
++}
++
++static struct platform_driver ath_ahb_driver = {
++ .probe = ath_ahb_probe,
++ .remove = ath_ahb_remove,
++ .driver = {
++ .name = "ar231x-wmac",
++ .owner = THIS_MODULE,
++ },
++};
++
++module_platform_driver(ath_ahb_driver);
+--- a/drivers/net/wireless/ath/ath5k/ath5k.h
++++ b/drivers/net/wireless/ath/ath5k/ath5k.h
+@@ -1647,6 +1647,32 @@ static inline struct ath_regulatory *ath
+ return &(ath5k_hw_common(ah)->regulatory);
+ }
+
++#ifdef CONFIG_ATHEROS_AR231X
++#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
++
++static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
++{
++ /* On AR2315 and AR2317 the PCI clock domain registers
++ * are outside of the WMAC register space */
++ if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
++ (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
++ return AR5K_AR2315_PCI_BASE + reg;
++
++ return ah->iobase + reg;
++}
++
++static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
++{
++ return ioread32(ath5k_ahb_reg(ah, reg));
++}
++
++static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
++{
++ iowrite32(val, ath5k_ahb_reg(ah, reg));
++}
++
++#else
++
+ static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
+ {
+ return ioread32(ah->iobase + reg);
+@@ -1657,6 +1683,8 @@ static inline void ath5k_hw_reg_write(st
+ iowrite32(val, ah->iobase + reg);
+ }
+
++#endif
++
+ static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
+ {
+ return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
+--- a/drivers/net/wireless/ath/ath5k/base.c
++++ b/drivers/net/wireless/ath/ath5k/base.c
+@@ -99,6 +99,15 @@ static int ath5k_reset(struct ath5k_hw *
+
+ /* Known SREVs */
+ static const struct ath5k_srev_name srev_names[] = {
++#ifdef CONFIG_ATHEROS_AR231X
++ { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
++ { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
++ { "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
++ { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
++ { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
++ { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
++ { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
++#else
+ { "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
+ { "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
+ { "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
+@@ -117,6 +126,7 @@ static const struct ath5k_srev_name srev
+ { "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
+ { "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
+ { "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
++#endif
+ { "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
+ { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
+ { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
+@@ -132,6 +142,10 @@ static const struct ath5k_srev_name srev
+ { "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
+ { "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
+ { "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
++#ifdef CONFIG_ATHEROS_AR231X
++ { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
++ { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
++#endif
+ { "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
+ };
+
+--- a/drivers/net/wireless/ath/ath5k/led.c
++++ b/drivers/net/wireless/ath/ath5k/led.c
+@@ -163,14 +163,20 @@ int ath5k_init_leds(struct ath5k_hw *ah)
+ {
+ int ret = 0;
+ struct ieee80211_hw *hw = ah->hw;
++#ifndef CONFIG_ATHEROS_AR231X
+ struct pci_dev *pdev = ah->pdev;
++#endif
+ char name[ATH5K_LED_MAX_NAME_LEN + 1];
+ const struct pci_device_id *match;
+
+ if (!ah->pdev)
+ return 0;
+
++#ifdef CONFIG_ATHEROS_AR231X
++ match = NULL;
++#else
+ match = pci_match_id(&ath5k_led_devices[0], pdev);
++#endif
+ if (match) {
+ __set_bit(ATH_STAT_LEDSOFT, ah->status);
+ ah->led_pin = ATH_PIN(match->driver_data);
+--- a/drivers/net/wireless/ath/ath5k/debug.c
++++ b/drivers/net/wireless/ath/ath5k/debug.c
+@@ -65,6 +65,7 @@
+
+ #include <linux/seq_file.h>
+ #include <linux/list.h>
++#include <linux/vmalloc.h>
+ #include "debug.h"
+ #include "ath5k.h"
+ #include "reg.h"
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -222,31 +222,28 @@ static void ath9k_hw_read_revisions(stru
+ {
+ u32 val;
+
++ if (ah->get_mac_revision)
++ ah->hw_version.macRev = ah->get_mac_revision();
++
+ switch (ah->hw_version.devid) {
+ case AR5416_AR9100_DEVID:
+ ah->hw_version.macVersion = AR_SREV_VERSION_9100;
+ break;
+ case AR9300_DEVID_AR9330:
+ ah->hw_version.macVersion = AR_SREV_VERSION_9330;
+- if (ah->get_mac_revision) {
+- ah->hw_version.macRev = ah->get_mac_revision();
+- } else {
++ if (!ah->get_mac_revision) {
+ val = REG_READ(ah, AR_SREV);
+ ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
+ }
+ return;
+ case AR9300_DEVID_AR9340:
+ ah->hw_version.macVersion = AR_SREV_VERSION_9340;
+- val = REG_READ(ah, AR_SREV);
+- ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
+ return;
+ case AR9300_DEVID_QCA955X:
+ ah->hw_version.macVersion = AR_SREV_VERSION_9550;
+ return;
+ case AR9300_DEVID_AR953X:
+ ah->hw_version.macVersion = AR_SREV_VERSION_9531;
+- if (ah->get_mac_revision)
+- ah->hw_version.macRev = ah->get_mac_revision();
+ return;
+ }
+
+@@ -704,6 +701,8 @@ static void ath9k_hw_init_pll(struct ath
+ {
+ u32 pll;
+
++ pll = ath9k_hw_compute_pll_control(ah, chan);
++
+ if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
+ /* program BB PLL ki and kd value, ki=0x4, kd=0x40 */
+ REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
+@@ -754,7 +753,8 @@ static void ath9k_hw_init_pll(struct ath
+ REG_RMW_FIELD(ah, AR_CH0_DDR_DPLL3,
+ AR_CH0_DPLL3_PHASE_SHIFT, 0x1);
+
+- REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
++ REG_WRITE(ah, AR_RTC_PLL_CONTROL,
++ pll | AR_RTC_9300_PLL_BYPASS);
+ udelay(1000);
+
+ /* program refdiv, nint, frac to RTC register */
+@@ -770,7 +770,8 @@ static void ath9k_hw_init_pll(struct ath
+ } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
+ u32 regval, pll2_divint, pll2_divfrac, refdiv;
+
+- REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
++ REG_WRITE(ah, AR_RTC_PLL_CONTROL,
++ pll | AR_RTC_9300_SOC_PLL_BYPASS);
+ udelay(1000);
+
+ REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16);
+@@ -843,7 +844,6 @@ static void ath9k_hw_init_pll(struct ath
+ udelay(1000);
+ }
+
+- pll = ath9k_hw_compute_pll_control(ah, chan);
+ if (AR_SREV_9565(ah))
+ pll |= 0x40000;
+ REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
+@@ -1192,9 +1192,12 @@ static void ath9k_hw_set_operating_mode(
+
+ switch (opmode) {
+ case NL80211_IFTYPE_ADHOC:
+- set |= AR_STA_ID1_ADHOC;
+- REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
+- break;
++ if (!AR_SREV_9340_13(ah)) {
++ set |= AR_STA_ID1_ADHOC;
++ REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
++ break;
++ }
++ /* fall through */
+ case NL80211_IFTYPE_MESH_POINT:
+ case NL80211_IFTYPE_AP:
+ set |= AR_STA_ID1_STA_AP;
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -903,6 +903,10 @@
+ #define AR_SREV_9340(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9340))
+
++#define AR_SREV_9340_13(_ah) \
++ (AR_SREV_9340((_ah)) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9340_13))
++
+ #define AR_SREV_9340_13_OR_LATER(_ah) \
+ (AR_SREV_9340((_ah)) && \
+ ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9340_13))
+@@ -1240,12 +1244,23 @@ enum {
+ #define AR_CH0_DPLL3_PHASE_SHIFT_S 23
+ #define AR_PHY_CCA_NOM_VAL_2GHZ -118
+
++#define AR_RTC_9300_SOC_PLL_DIV_INT 0x0000003f
++#define AR_RTC_9300_SOC_PLL_DIV_INT_S 0
++#define AR_RTC_9300_SOC_PLL_DIV_FRAC 0x000fffc0
++#define AR_RTC_9300_SOC_PLL_DIV_FRAC_S 6
++#define AR_RTC_9300_SOC_PLL_REFDIV 0x01f00000
++#define AR_RTC_9300_SOC_PLL_REFDIV_S 20
++#define AR_RTC_9300_SOC_PLL_CLKSEL 0x06000000
++#define AR_RTC_9300_SOC_PLL_CLKSEL_S 25
++#define AR_RTC_9300_SOC_PLL_BYPASS 0x08000000
++
+ #define AR_RTC_9300_PLL_DIV 0x000003ff
+ #define AR_RTC_9300_PLL_DIV_S 0
+ #define AR_RTC_9300_PLL_REFDIV 0x00003C00
+ #define AR_RTC_9300_PLL_REFDIV_S 10
+ #define AR_RTC_9300_PLL_CLKSEL 0x0000C000
+ #define AR_RTC_9300_PLL_CLKSEL_S 14
++#define AR_RTC_9300_PLL_BYPASS 0x00010000
+
+ #define AR_RTC_9160_PLL_DIV 0x000003ff
+ #define AR_RTC_9160_PLL_DIV_S 0
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -1004,11 +1004,9 @@ static bool ar5008_hw_ani_control_new(st
+@@ -1004,9 +1004,11 @@ static bool ar5008_hw_ani_control_new(st
case ATH9K_ANI_FIRSTEP_LEVEL:{
u32 level = param;
-- value = level * 2;
-+ value = level;
+- value = level;
++ value = level * 2;
REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
AR_PHY_FIND_SIG_FIRSTEP, value);
-- REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
-- AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
++ REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
++ AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
if (level != aniState->firstepLevel) {
ath_dbg(common, ANI,
---- a/drivers/net/wireless/ath/ath9k/beacon.c
-+++ b/drivers/net/wireless/ath/ath9k/beacon.c
-@@ -312,10 +312,9 @@ static void ath9k_csa_update_vif(void *d
-
- void ath9k_csa_update(struct ath_softc *sc)
- {
-- ieee80211_iterate_active_interfaces(sc->hw,
-- IEEE80211_IFACE_ITER_NORMAL,
-- ath9k_csa_update_vif,
-- sc);
-+ ieee80211_iterate_active_interfaces_atomic(sc->hw,
-+ IEEE80211_IFACE_ITER_NORMAL,
-+ ath9k_csa_update_vif, sc);
+@@ -1040,9 +1042,8 @@ static bool ar5008_hw_ani_control_new(st
+ REG_RMW_FIELD(ah, AR_PHY_TIMING5,
+ AR_PHY_TIMING5_CYCPWR_THR1, value);
+
+- if (IS_CHAN_HT40(ah->curchan))
+- REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
+- AR_PHY_EXT_TIMING5_CYCPWR_THR1, value);
++ REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
++ AR_PHY_EXT_TIMING5_CYCPWR_THR1, value - 1);
+
+ if (level != aniState->spurImmunityLevel) {
+ ath_dbg(common, ANI,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -517,6 +517,23 @@ static void ar9003_hw_spur_mitigate(stru
+ ar9003_hw_spur_mitigate_ofdm(ah, chan);
+ }
+
++static u32 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah,
++ struct ath9k_channel *chan)
++{
++ u32 pll;
++
++ pll = SM(0x5, AR_RTC_9300_SOC_PLL_REFDIV);
++
++ if (chan && IS_CHAN_HALF_RATE(chan))
++ pll |= SM(0x1, AR_RTC_9300_SOC_PLL_CLKSEL);
++ else if (chan && IS_CHAN_QUARTER_RATE(chan))
++ pll |= SM(0x2, AR_RTC_9300_SOC_PLL_CLKSEL);
++
++ pll |= SM(0x2c, AR_RTC_9300_SOC_PLL_DIV_INT);
++
++ return pll;
++}
++
+ static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+@@ -1781,7 +1798,12 @@ void ar9003_hw_attach_phy_ops(struct ath
+
+ priv_ops->rf_set_freq = ar9003_hw_set_channel;
+ priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
+- priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
++
++ if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
++ priv_ops->compute_pll_control = ar9003_hw_compute_pll_control_soc;
++ else
++ priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
++
+ priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
+ priv_ops->init_bb = ar9003_hw_init_bb;
+ priv_ops->process_ini = ar9003_hw_process_ini;
+--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
+@@ -381,16 +381,27 @@ static int ar9002_hw_proc_txdesc(struct
+ ts->evm1 = ads->AR_TxEVM1;
+ ts->evm2 = ads->AR_TxEVM2;
+
+- status = ACCESS_ONCE(ads->ds_ctl4);
+- ts->duration[0] = MS(status, AR_PacketDur0);
+- ts->duration[1] = MS(status, AR_PacketDur1);
+- status = ACCESS_ONCE(ads->ds_ctl5);
+- ts->duration[2] = MS(status, AR_PacketDur2);
+- ts->duration[3] = MS(status, AR_PacketDur3);
+-
+ return 0;
+ }
+
++static int ar9002_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
++{
++ struct ar5416_desc *ads = AR5416DESC(ds);
++
++ switch (index) {
++ case 0:
++ return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur0);
++ case 1:
++ return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur1);
++ case 2:
++ return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur2);
++ case 3:
++ return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur3);
++ default:
++ return -1;
++ }
++}
++
+ void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
+ u32 size, u32 flags)
+ {
+@@ -413,4 +424,5 @@ void ar9002_hw_attach_mac_ops(struct ath
+ ops->get_isr = ar9002_hw_get_isr;
+ ops->set_txdesc = ar9002_set_txdesc;
+ ops->proc_txdesc = ar9002_hw_proc_txdesc;
++ ops->get_duration = ar9002_hw_get_duration;
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+@@ -355,11 +355,9 @@ static int ar9003_hw_proc_txdesc(struct
+ struct ath_tx_status *ts)
+ {
+ struct ar9003_txs *ads;
+- struct ar9003_txc *adc;
+ u32 status;
+
+ ads = &ah->ts_ring[ah->ts_tail];
+- adc = (struct ar9003_txc *)ads;
+
+ status = ACCESS_ONCE(ads->status8);
+ if ((status & AR_TxDone) == 0)
+@@ -428,18 +426,29 @@ static int ar9003_hw_proc_txdesc(struct
+ ts->ts_rssi_ext1 = MS(status, AR_TxRSSIAnt11);
+ ts->ts_rssi_ext2 = MS(status, AR_TxRSSIAnt12);
+
+- status = ACCESS_ONCE(adc->ctl15);
+- ts->duration[0] = MS(status, AR_PacketDur0);
+- ts->duration[1] = MS(status, AR_PacketDur1);
+- status = ACCESS_ONCE(adc->ctl16);
+- ts->duration[2] = MS(status, AR_PacketDur2);
+- ts->duration[3] = MS(status, AR_PacketDur3);
+-
+ memset(ads, 0, sizeof(*ads));
+
+ return 0;
+ }
+
++static int ar9003_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
++{
++ const struct ar9003_txc *adc = ds;
++
++ switch (index) {
++ case 0:
++ return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur0);
++ case 1:
++ return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur1);
++ case 2:
++ return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur2);
++ case 3:
++ return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur3);
++ default:
++ return 0;
++ }
++}
++
+ void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
+ {
+ struct ath_hw_ops *ops = ath9k_hw_ops(hw);
+@@ -449,6 +458,7 @@ void ar9003_hw_attach_mac_ops(struct ath
+ ops->get_isr = ar9003_hw_get_isr;
+ ops->set_txdesc = ar9003_set_txdesc;
+ ops->proc_txdesc = ar9003_hw_proc_txdesc;
++ ops->get_duration = ar9003_hw_get_duration;
+ }
+
+ void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
+--- a/drivers/net/wireless/ath/ath9k/dynack.c
++++ b/drivers/net/wireless/ath/ath9k/dynack.c
+@@ -202,7 +202,7 @@ void ath_dynack_sample_tx_ts(struct ath_
+ ridx = ts->ts_rateindex;
+
+ da->st_rbf.ts[da->st_rbf.t_rb].tstamp = ts->ts_tstamp;
+- da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration[ts->ts_rateindex];
++ da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration;
+ ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_dest, hdr->addr1);
+ ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_src, hdr->addr2);
+
+--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
++++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
+@@ -67,6 +67,12 @@ static inline int ath9k_hw_txprocdesc(st
+ return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
+ }
+
++static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
++ int index)
++{
++ return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
++}
++
+ static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
+ struct ath_hw_antcomb_conf *antconf)
+ {
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -691,6 +691,7 @@ struct ath_hw_ops {
+ struct ath_tx_info *i);
+ int (*proc_txdesc)(struct ath_hw *ah, void *ds,
+ struct ath_tx_status *ts);
++ int (*get_duration)(struct ath_hw *ah, const void *ds, int index);
+ void (*antdiv_comb_conf_get)(struct ath_hw *ah,
+ struct ath_hw_antcomb_conf *antconf);
+ void (*antdiv_comb_conf_set)(struct ath_hw *ah,
+--- a/drivers/net/wireless/ath/ath9k/mac.h
++++ b/drivers/net/wireless/ath/ath9k/mac.h
+@@ -121,7 +121,7 @@ struct ath_tx_status {
+ u32 evm0;
+ u32 evm1;
+ u32 evm2;
+- u32 duration[4];
++ u32 duration;
+ };
+
+ struct ath_rx_status {
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -683,6 +683,8 @@ static void ath_tx_process_buffer(struct
+ if (bf_is_ampdu_not_probing(bf))
+ txq->axq_ampdu_depth--;
+
++ ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc,
++ ts->ts_rateindex);
+ if (!bf_isampdu(bf)) {
+ if (!flush) {
+ info = IEEE80211_SKB_CB(bf->bf_mpdu);
+--- a/drivers/net/wireless/ath/ath9k/ath9k.h
++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+@@ -455,7 +455,8 @@ void ath9k_p2p_bss_info_changed(struct a
+ void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
+ struct sk_buff *skb);
+ void ath9k_p2p_ps_timer(void *priv);
+-void ath9k_chanctx_wake_queues(struct ath_softc *sc);
++void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
++void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
+ void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
+
+ void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
+@@ -525,7 +526,12 @@ static inline void ath9k_beacon_add_noa(
+ static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
+ {
+ }
+-static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc)
++static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
++ struct ath_chanctx *ctx)
++{
++}
++static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
++ struct ath_chanctx *ctx)
+ {
+ }
+ static inline void ath_chanctx_check_active(struct ath_softc *sc,
+--- a/drivers/net/wireless/ath/ath9k/channel.c
++++ b/drivers/net/wireless/ath/ath9k/channel.c
+@@ -761,6 +761,13 @@ void ath_offchannel_next(struct ath_soft
+
+ void ath_roc_complete(struct ath_softc *sc, bool abort)
+ {
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++
++ if (abort)
++ ath_dbg(common, CHAN_CTX, "RoC aborted\n");
++ else
++ ath_dbg(common, CHAN_CTX, "RoC expired\n");
++
+ sc->offchannel.roc_vif = NULL;
+ sc->offchannel.roc_chan = NULL;
+ if (!abort)
+@@ -1037,9 +1044,11 @@ static void ath_offchannel_channel_chang
+ void ath_chanctx_set_next(struct ath_softc *sc, bool force)
+ {
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ struct ath_chanctx *old_ctx;
+ struct timespec ts;
+ bool measure_time = false;
+ bool send_ps = false;
++ bool queues_stopped = false;
+
+ spin_lock_bh(&sc->chan_lock);
+ if (!sc->next_chan) {
+@@ -1069,6 +1078,10 @@ void ath_chanctx_set_next(struct ath_sof
+ getrawmonotonic(&ts);
+ measure_time = true;
+ }
++
++ ath9k_chanctx_stop_queues(sc, sc->cur_chan);
++ queues_stopped = true;
++
+ __ath9k_flush(sc->hw, ~0, true);
+
+ if (ath_chanctx_send_ps_frame(sc, true))
+@@ -1082,6 +1095,7 @@ void ath_chanctx_set_next(struct ath_sof
+ sc->cur_chan->tsf_val = ath9k_hw_gettsf64(sc->sc_ah);
+ }
+ }
++ old_ctx = sc->cur_chan;
+ sc->cur_chan = sc->next_chan;
+ sc->cur_chan->stopped = false;
+ sc->next_chan = NULL;
+@@ -1104,7 +1118,16 @@ void ath_chanctx_set_next(struct ath_sof
+ if (measure_time)
+ sc->sched.channel_switch_time =
+ ath9k_hw_get_tsf_offset(&ts, NULL);
++ /*
++ * A reset will ensure that all queues are woken up,
++ * so there is no need to awaken them again.
++ */
++ goto out;
+ }
++
++ if (queues_stopped)
++ ath9k_chanctx_wake_queues(sc, old_ctx);
++out:
+ if (send_ps)
+ ath_chanctx_send_ps_frame(sc, false);
+
+@@ -1170,18 +1193,37 @@ bool ath9k_is_chanctx_enabled(void)
+ /* Queue management */
+ /********************/
+
+-void ath9k_chanctx_wake_queues(struct ath_softc *sc)
++void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ int i;
++
++ if (ctx == &sc->offchannel.chan) {
++ ieee80211_stop_queue(sc->hw,
++ sc->hw->offchannel_tx_hw_queue);
++ } else {
++ for (i = 0; i < IEEE80211_NUM_ACS; i++)
++ ieee80211_stop_queue(sc->hw,
++ ctx->hw_queue_base + i);
++ }
++
++ if (ah->opmode == NL80211_IFTYPE_AP)
++ ieee80211_stop_queue(sc->hw, sc->hw->queues - 2);
++}
++
++
++void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ int i;
+
+- if (sc->cur_chan == &sc->offchannel.chan) {
++ if (ctx == &sc->offchannel.chan) {
+ ieee80211_wake_queue(sc->hw,
+ sc->hw->offchannel_tx_hw_queue);
+ } else {
+ for (i = 0; i < IEEE80211_NUM_ACS; i++)
+ ieee80211_wake_queue(sc->hw,
+- sc->cur_chan->hw_queue_base + i);
++ ctx->hw_queue_base + i);
+ }
+
+ if (ah->opmode == NL80211_IFTYPE_AP)
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+@@ -464,6 +464,7 @@ static int ath9k_init_priv(struct ath9k_
+ return -ENOMEM;
+
+ ah->dev = priv->dev;
++ ah->hw = priv->hw;
+ ah->hw_version.devid = devid;
+ ah->hw_version.usbdev = drv_info;
+ ah->ah_flags |= AH_USE_EEPROM;
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -60,8 +60,10 @@ static bool ath9k_has_pending_frames(str
+
+ spin_lock_bh(&txq->axq_lock);
+
+- if (txq->axq_depth)
++ if (txq->axq_depth) {
+ pending = true;
++ goto out;
++ }
+
+ if (txq->mac80211_qnum >= 0) {
+ struct list_head *list;
+@@ -70,6 +72,7 @@ static bool ath9k_has_pending_frames(str
+ if (!list_empty(list))
+ pending = true;
+ }
++out:
+ spin_unlock_bh(&txq->axq_lock);
+ return pending;
}
+@@ -261,12 +264,7 @@ static bool ath_complete_reset(struct at
+
+ ath9k_hw_set_interrupts(ah);
+ ath9k_hw_enable_interrupts(ah);
+-
+- if (!ath9k_is_chanctx_enabled())
+- ieee80211_wake_queues(sc->hw);
+- else
+- ath9k_chanctx_wake_queues(sc);
+-
++ ieee80211_wake_queues(sc->hw);
+ ath9k_p2p_ps_timer(sc);
- void ath9k_beacon_tasklet(unsigned long data)
---- a/net/mac80211/main.c
-+++ b/net/mac80211/main.c
-@@ -152,6 +152,8 @@ static u32 ieee80211_hw_conf_chan(struct
- list_for_each_entry_rcu(sdata, &local->interfaces, list) {
- if (!rcu_access_pointer(sdata->vif.chanctx_conf))
+ return true;
+@@ -1971,9 +1969,6 @@ static bool ath9k_has_tx_pending(struct
+ if (!ATH_TXQ_SETUP(sc, i))
continue;
-+ if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
-+ continue;
- power = min(power, sdata->vif.bss_conf.txpower);
+
+- if (!sc->tx.txq[i].axq_depth)
+- continue;
+-
+ npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
+ if (npend)
+ break;
+@@ -1999,7 +1994,6 @@ void __ath9k_flush(struct ieee80211_hw *
+ struct ath_common *common = ath9k_hw_common(ah);
+ int timeout = HZ / 5; /* 200 ms */
+ bool drain_txq;
+- int i;
+
+ cancel_delayed_work_sync(&sc->tx_complete_work);
+
+@@ -2027,10 +2021,6 @@ void __ath9k_flush(struct ieee80211_hw *
+ ath_reset(sc);
+
+ ath9k_ps_restore(sc);
+- for (i = 0; i < IEEE80211_NUM_ACS; i++) {
+- ieee80211_wake_queue(sc->hw,
+- sc->cur_chan->hw_queue_base + i);
+- }
}
- rcu_read_unlock();
-@@ -203,7 +205,7 @@ void ieee80211_bss_info_change_notify(st
+
+ ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
+@@ -2039,16 +2029,8 @@ void __ath9k_flush(struct ieee80211_hw *
+ static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
{
- struct ieee80211_local *local = sdata->local;
+ struct ath_softc *sc = hw->priv;
+- int i;
+-
+- for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+- if (!ATH_TXQ_SETUP(sc, i))
+- continue;
-- if (!changed)
-+ if (!changed || sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
- return;
+- if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
+- return true;
+- }
+- return false;
++ return ath9k_has_tx_pending(sc);
+ }
+
+ static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
+@@ -2350,7 +2332,7 @@ static void ath9k_remove_chanctx(struct
+ conf->def.chan->center_freq);
+
+ ctx->assigned = false;
+- ctx->hw_queue_base = -1;
++ ctx->hw_queue_base = 0;
+ ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
+
+ mutex_unlock(&sc->mutex);
+--- a/net/mac80211/rate.c
++++ b/net/mac80211/rate.c
+@@ -448,7 +448,7 @@ static void rate_fixup_ratelist(struct i
+ */
+ if (!(rates[0].flags & IEEE80211_TX_RC_MCS)) {
+ u32 basic_rates = vif->bss_conf.basic_rates;
+- s8 baserate = basic_rates ? ffs(basic_rates - 1) : 0;
++ s8 baserate = basic_rates ? ffs(basic_rates) - 1 : 0;
+
+ rate = &sband->bitrates[rates[0].idx];
- drv_bss_info_changed(local, sdata, &sdata->vif.bss_conf, changed);
projects / openwrt / staging / rmilecki.git / blobdiff