/******************/
/* Chip Revisions */
/******************/
-@@ -1386,6 +1399,9 @@ static bool ath9k_hw_set_reset(struct at
+@@ -1387,6 +1400,9 @@ static bool ath9k_hw_set_reset(struct at
if (AR_SREV_9100(ah))
udelay(50);
return true;
}
-@@ -1485,6 +1501,9 @@ static bool ath9k_hw_chip_reset(struct a
+@@ -1486,6 +1502,9 @@ static bool ath9k_hw_chip_reset(struct a
ar9003_hw_internal_regulator_apply(ah);
ath9k_hw_init_pll(ah, chan);
return true;
}
-@@ -1786,8 +1805,14 @@ static int ath9k_hw_do_fastcc(struct ath
+@@ -1787,8 +1806,14 @@ static int ath9k_hw_do_fastcc(struct ath
if (AR_SREV_9271(ah))
ar9002_hw_load_ani_reg(ah, chan);
return -EINVAL;
}
-@@ -2041,6 +2066,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+@@ -2042,6 +2067,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
ath9k_hw_set_radar_params(ah);
}