/*
* ADM5120 HCD (Host Controller Driver) for USB
*
- * Copyright (C) 2007,2008 Gabor Juhos <juhosg at openwrt.org>
+ * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This file was derived from: drivers/usb/host/ohci-q.c
* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
*/
#include <linux/irq.h>
+#include <linux/slab.h>
/*-------------------------------------------------------------------------*/
}
#ifdef ADMHC_VERBOSE_DEBUG
- urb_print(ahcd, urb, "RET", usb_pipeout (urb->pipe), status);
+ urb_print(ahcd, urb, "RET", usb_pipeout(urb->pipe), status);
#endif
/* urb->complete() can reenter this HCD */
* that has enough bandwidth left unreserved.
*/
for (i = 0; i < interval ; i++) {
- if (branch < 0 || ahcd->load [branch] > ahcd->load [i]) {
+ if (branch < 0 || ahcd->load[branch] > ahcd->load[i]) {
int j;
/* usb 1.1 says 90% of one frame */
for (j = i; j < NUM_INTS; j += interval) {
- if ((ahcd->load [j] + load) > 900)
+ if ((ahcd->load[j] + load) > 900)
break;
}
if (j < NUM_INTS)
* into the schedule tree in the apppropriate place. most iso devices use
* 1msec periods, but that's not required.
*/
-static void periodic_link (struct admhcd *ahcd, struct ed *ed)
+static void periodic_link(struct admhcd *ahcd, struct ed *ed)
{
unsigned i;
- admhc_vdbg (ahcd, "link %sed %p branch %d [%dus.], interval %d\n",
+ admhc_vdbg(ahcd, "link %sed %p branch %d [%dus.], interval %d\n",
(ed->hwINFO & cpu_to_hc32(ahcd, ED_ISO)) ? "iso " : "",
ed, ed->branch, ed->load, ed->interval);
for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
- struct ed **prev = &ahcd->periodic [i];
- __hc32 *prev_p = &ahcd->hcca->int_table [i];
+ struct ed **prev = &ahcd->periodic[i];
+ __hc32 *prev_p = &ahcd->hcca->int_table[i];
struct ed *here = *prev;
/* sorting each branch by period (slow before fast)
ed->ed_next = here;
if (here)
ed->hwNextED = *prev_p;
- wmb ();
+ wmb();
*prev = ed;
*prev_p = cpu_to_hc32(ahcd, ed->dma);
wmb();
}
- ahcd->load [i] += ed->load;
+ ahcd->load[i] += ed->load;
}
admhcd_to_hcd(ahcd)->self.bandwidth_allocated += ed->load / ed->interval;
}
#if 0 /* FIXME */
/* scan the periodic table to find and unlink this ED */
-static void periodic_unlink (struct admhcd *ahcd, struct ed *ed)
+static void periodic_unlink(struct admhcd *ahcd, struct ed *ed)
{
int i;
for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
struct ed *temp;
- struct ed **prev = &ahcd->periodic [i];
- __hc32 *prev_p = &ahcd->hcca->int_table [i];
+ struct ed **prev = &ahcd->periodic[i];
+ __hc32 *prev_p = &ahcd->hcca->int_table[i];
while (*prev && (temp = *prev) != ed) {
prev_p = &temp->hwNextED;
*prev_p = ed->hwNextED;
*prev = ed->ed_next;
}
- ahcd->load [i] -= ed->load;
+ ahcd->load[i] -= ed->load;
}
admhcd_to_hcd(ahcd)->self.bandwidth_allocated -= ed->load / ed->interval;
- admhc_vdbg (ahcd, "unlink %sed %p branch %d [%dus.], interval %d\n",
+ admhc_vdbg(ahcd, "unlink %sed %p branch %d [%dus.], interval %d\n",
(ed->hwINFO & cpu_to_hc32(ahcd, ED_ISO)) ? "iso " : "",
ed, ed->branch, ed->load, ed->interval);
}
u32 info;
/* FIXME: usbcore changes dev->devnum before SET_ADDRESS
- * suceeds ... otherwise we wouldn't need "pipe".
+ * succeeds ... otherwise we wouldn't need "pipe".
*/
info = usb_pipedevice(pipe);
info |= (ep->desc.bEndpointAddress & ~USB_DIR_IN) << ED_EN_SHIFT;
urb->iso_frame_desc[td->index].status = cc_to_error[cc];
if (cc != TD_CC_NOERROR)
- admhc_vdbg (ahcd,
+ admhc_vdbg(ahcd,
"urb %p iso td %p (%d) len %d cc %d\n",
urb, td, 1 + td->index, dlen, cc);
/* count all non-empty packets except control SETUP packet */
- if ((type != PIPE_CONTROL || td->index != 0) && tdDBP != 0) {
+ if ((type != PIPE_CONTROL || td->index != 0) && tdDBP != 0)
urb->actual_length += tdDBP - td->data_dma + bl;
- }
if (cc != TD_CC_NOERROR && cc < TD_CC_HCD0)
admhc_vdbg(ahcd,
/*-------------------------------------------------------------------------*/
-static inline void
-ed_halted(struct admhcd *ahcd, struct td *td, int cc, struct td *rev)
+static void ed_halted(struct admhcd *ahcd, struct td *td, int cc)
{
struct urb *urb = td->urb;
struct urb_priv *urb_priv = urb->hcpriv;
break;
/* fallthrough */
default:
- admhc_dbg (ahcd,
+ admhc_dbg(ahcd,
"urb %p path %s ep%d%s %08x cc %d --> status %d\n",
urb, urb->dev->devpath,
usb_pipeendpoint (urb->pipe),
- usb_pipein (urb->pipe) ? "in" : "out",
+ usb_pipein(urb->pipe) ? "in" : "out",
hc32_to_cpu(ahcd, td->hwINFO),
- cc, cc_to_error [cc]);
+ cc, cc_to_error[cc]);
}
}
* frame counter wraps and EDs with partially retired TDs
*/
if (likely(HC_IS_RUNNING(admhcd_to_hcd(ahcd)->state))) {
- if (tick_before (tick, ed->tick)) {
+ if (tick_before(tick, ed->tick)) {
skip_ed:
last = &ed->ed_rm_next;
continue;
struct urb *urb;
struct urb_priv *urb_priv;
__hc32 savebits;
+ u32 tdINFO;
int status;
td = list_entry(entry, struct td, td_list);
/* patch pointer hc uses */
savebits = *prev & ~cpu_to_hc32(ahcd, TD_MASK);
*prev = td->hwNextTD | savebits;
+ /* If this was unlinked, the TD may not have been
+ * retired ... so manually save dhe data toggle.
+ * The controller ignores the value we save for
+ * control and ISO endpoints.
+ */
+ tdINFO = hc32_to_cpup(ahcd, &td->hwINFO);
+ if ((tdINFO & TD_T) == TD_T_DATA0)
+ ed->hwHeadP &= ~cpu_to_hc32(ahcd, ED_C);
+ else if ((tdINFO & TD_T) == TD_T_DATA1)
+ ed->hwHeadP |= cpu_to_hc32(ahcd, ED_C);
/* HC may have partly processed this TD */
#ifdef ADMHC_VERBOSE_DEBUG
}
/*-------------------------------------------------------------------------*/
-
/*
* Process normal completions (error or success) and clean the schedules.
*
* This is the main path for handing urbs back to drivers. The only other
- * path is finish_unlinks(), which unlinks URBs using ed_rm_list, instead of
- * scanning the (re-reversed) donelist as this does.
+ * normal path is finish_unlinks(), which unlinks URBs using ed_rm_list,
+ * instead of scanning the (re-reversed) donelist as this does.
*/
static void ed_unhalt(struct admhcd *ahcd, struct ed *ed, struct urb *urb)
{
- struct list_head *entry,*tmp;
+ struct list_head *entry, *tmp;
__hc32 toggle = ed->hwHeadP & cpu_to_hc32(ahcd, ED_C);
#ifdef ADMHC_VERBOSE_DEBUG
static void ed_update(struct admhcd *ahcd, struct ed *ed)
{
- struct list_head *entry,*tmp;
+ struct list_head *entry, *tmp;
#ifdef ADMHC_VERBOSE_DEBUG
admhc_dump_ed(ahcd, "UPDATE", ed, 1);
ed_unhalt(ahcd, ed, urb);
if (ed->type == PIPE_INTERRUPT)
- ed_intr_refill(ahcd,ed);
+ ed_intr_refill(ahcd, ed);
/* If all this urb's TDs are done, call complete() */
if (urb_priv->td_idx == urb_priv->td_cnt)
/* ... hc may need waking-up */
switch (ed->type) {
case PIPE_CONTROL:
- admhc_writel (ahcd, OHCI_CLF,
+ admhc_writel(ahcd, OHCI_CLF,
&ahcd->regs->cmdstatus);
break;
case PIPE_BULK:
- admhc_writel (ahcd, OHCI_BLF,
+ admhc_writel(ahcd, OHCI_BLF,
&ahcd->regs->cmdstatus);
break;
}
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