}
int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size)
-@@ -1079,18 +1086,29 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -1075,18 +1082,29 @@ static void crypto4xx_bh_tasklet_cb(unsi
/**
* Top Half of isr.
*/
/**
* Supported Crypto Algorithms
*/
-@@ -1272,6 +1290,8 @@ static int crypto4xx_probe(struct platfo
+@@ -1268,6 +1286,8 @@ static int crypto4xx_probe(struct platfo
struct resource res;
struct device *dev = &ofdev->dev;
struct crypto4xx_core_device *core_dev;
rc = of_address_to_resource(ofdev->dev.of_node, 0, &res);
if (rc)
-@@ -1288,6 +1308,7 @@ static int crypto4xx_probe(struct platfo
+@@ -1284,6 +1304,7 @@ static int crypto4xx_probe(struct platfo
mfdcri(SDR0, PPC405EX_SDR0_SRST) | PPC405EX_CE_RESET);
mtdcri(SDR0, PPC405EX_SDR0_SRST,
mfdcri(SDR0, PPC405EX_SDR0_SRST) & ~PPC405EX_CE_RESET);
} else if (of_find_compatible_node(NULL, NULL,
"amcc,ppc460sx-crypto")) {
mtdcri(SDR0, PPC460SX_SDR0_SRST,
-@@ -1310,7 +1331,22 @@ static int crypto4xx_probe(struct platfo
+@@ -1306,7 +1327,22 @@ static int crypto4xx_probe(struct platfo
if (!core_dev->dev)
goto err_alloc_dev;
core_dev->device = dev;
spin_lock_init(&core_dev->lock);
INIT_LIST_HEAD(&core_dev->dev->alg_list);
-@@ -1340,7 +1376,9 @@ static int crypto4xx_probe(struct platfo
+@@ -1336,7 +1372,9 @@ static int crypto4xx_probe(struct platfo
/* Register for Crypto isr, Crypto Engine IRQ */
core_dev->irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);