kernel: bump 4.19 to 4.19.16

[openwrt/staging/hauke.git] / target / linux / apm821xx / patches-4.19 / 010-dmaengine-dw-dmac-implement-dma-prot.patch

diff --git a/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch b/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch
index 3c4edff3ebc9f90118561bcb472f4bf54ac2105f..86da6fcd89a253fc6c19c17235fab1e0a5097486 100644 (file)
--- a/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch
+++ b/target/linux/apm821xx/patches-4.19/010-dmaengine-dw-dmac-implement-dma-prot.patch
@@ -55,11 +55,9 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
 Signed-off-by: Vinod Koul <vkoul@kernel.org>
 ---
 
-diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
-index d0c3e50b39fb..2c5ca1961256 100644
 --- a/drivers/dma/dw/core.c
 +++ b/drivers/dma/dw/core.c
-@@ -160,12 +160,14 @@ static void dwc_initialize_chan_idma32(struct dw_dma_chan *dwc)
+@@ -160,12 +160,14 @@ static void dwc_initialize_chan_idma32(s
  
  static void dwc_initialize_chan_dw(struct dw_dma_chan *dwc)
  {
@@ -74,11 +72,9 @@ index d0c3e50b39fb..2c5ca1961256 100644
  
        /* Set polarity of handshake interface */
        cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
-diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
-index f01b2c173fa6..31ff8113c3de 100644
 --- a/drivers/dma/dw/platform.c
 +++ b/drivers/dma/dw/platform.c
-@@ -162,6 +162,12 @@ dw_dma_parse_dt(struct platform_device *pdev)
+@@ -162,6 +162,12 @@ dw_dma_parse_dt(struct platform_device *
                        pdata->multi_block[tmp] = 1;
        }
  
@@ -91,8 +87,6 @@ index f01b2c173fa6..31ff8113c3de 100644
        return pdata;
  }
  #else
-diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
-index 09e7dfdbb790..646c9c960c07 100644
 --- a/drivers/dma/dw/regs.h
 +++ b/drivers/dma/dw/regs.h
 @@ -200,6 +200,10 @@ enum dw_dma_msize {
@@ -106,11 +100,9 @@ index 09e7dfdbb790..646c9c960c07 100644
  #define DWC_CFGH_DS_UPD_EN    (1 << 5)
  #define DWC_CFGH_SS_UPD_EN    (1 << 6)
  #define DWC_CFGH_SRC_PER(x)   ((x) << 7)
-diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
-index 896cb71a382c..1a1d58ebffbf 100644
 --- a/include/linux/platform_data/dma-dw.h
 +++ b/include/linux/platform_data/dma-dw.h
-@@ -49,6 +49,7 @@  struct dw_dma_slave {
+@@ -49,6 +49,7 @@ struct dw_dma_slave {
   * @data_width: Maximum data width supported by hardware per AHB master
   *            (in bytes, power of 2)
   * @multi_block: Multi block transfers supported by hardware per channel.
@@ -118,7 +110,7 @@ index 896cb71a382c..1a1d58ebffbf 100644
   */
  struct dw_dma_platform_data {
        unsigned int    nr_channels;
-@@ -65,6 +66,11 @@  struct dw_dma_platform_data {
+@@ -65,6 +66,11 @@ struct dw_dma_platform_data {
        unsigned char   nr_masters;
        unsigned char   data_width[DW_DMA_MAX_NR_MASTERS];
        unsigned char   multi_block[DW_DMA_MAX_NR_CHANNELS];
@@ -130,12 +122,9 @@ index 896cb71a382c..1a1d58ebffbf 100644
  };
  
  #endif /* _PLATFORM_DATA_DMA_DW_H */
-diff --git a/include/dt-bindings/dma/dw-dmac.h b/include/dt-bindings/dma/dw-dmac.h
-new file mode 100644
-index 000000000000..d1ca705c95b3
 --- /dev/null
 +++ b/include/dt-bindings/dma/dw-dmac.h
-@@ -0,0 +1,14 @@ 
+@@ -0,0 +1,14 @@
 +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
 +
 +#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
@@ -150,6 +139,3 @@ index 000000000000..d1ca705c95b3
 +#define DW_DMAC_HPROT3_CACHEABLE      (1 << 2)        /* DMA is cacheable */
 +
 +#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */
---
-cgit 1.2-0.3.lf.el7
-