#define TL_WR941ND_GPIO_LED_SYSTEM 2
#define TL_WR941ND_GPIO_LED_QSS_RED 4
#define TL_WR941ND_GPIO_LED_QSS_GREEN 5
+#define TL_WR941ND_GPIO_LED_WLAN 9
#define TL_WR941ND_GPIO_BTN_RESET 3
#define TL_WR941ND_GPIO_BTN_QSS 7
.offset = 0,
.size = 0x020000,
.mask_flags = MTD_WRITEABLE,
- } , {
+ }, {
.name = "kernel",
.offset = 0x020000,
.size = 0x140000,
- } , {
+ }, {
.name = "rootfs",
.offset = 0x160000,
.size = 0x290000,
- } , {
+ }, {
.name = "art",
.offset = 0x3f0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
- } , {
+ }, {
.name = "firmware",
.offset = 0x020000,
.size = 0x3d0000,
static struct flash_platform_data tl_wr941nd_flash_data = {
#ifdef CONFIG_MTD_PARTITIONS
- .parts = tl_wr941nd_partitions,
- .nr_parts = ARRAY_SIZE(tl_wr941nd_partitions),
+ .parts = tl_wr941nd_partitions,
+ .nr_parts = ARRAY_SIZE(tl_wr941nd_partitions),
#endif
};
}, {
.name = "tl-wr941nd:green:qss",
.gpio = TL_WR941ND_GPIO_LED_QSS_GREEN,
+ }, {
+ .name = "tl-wr941nd:green:wlan",
+ .gpio = TL_WR941ND_GPIO_LED_WLAN,
+ .active_low = 1,
}
};
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
- ar71xx_set_mac_base(mac);
-
ar71xx_add_device_mdio(0x0);
+ ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ar71xx_eth0_data.speed = SPEED_100;
ar71xx_eth0_data.duplex = DUPLEX_FULL;