#define CPE510_GPIO_EXTERNAL_LNA1 19
#define CPE510_GPIO_BTN_RESET 4
+#define CPE510V2_GPIO_BTN_RESET 17
#define CPE510_KEYS_POLL_INTERVAL 20 /* msecs */
#define CPE510_KEYS_DEBOUNCE_INTERVAL (3 * CPE510_KEYS_POLL_INTERVAL)
+#define CPE510V2_KEYS_DEBOUNCE_INTERVAL (5 * CPE510_KEYS_POLL_INTERVAL)
static struct gpio_led cpe510_leds_gpio[] __initdata = {
},
};
+static struct gpio_led cpe510v2_leds_gpio[] __initdata = {
+ {
+ .name = "tp-link:green:lan0",
+ .gpio = CPE510_GPIO_LED_LAN0,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:link1",
+ .gpio = CPE510_GPIO_LED_L1,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:link2",
+ .gpio = CPE510_GPIO_LED_L2,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:link3",
+ .gpio = CPE510_GPIO_LED_L3,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:link4",
+ .gpio = CPE510_GPIO_LED_L4,
+ .active_low = 1,
+ },
+};
+
+
static struct gpio_led wbs510_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan0",
}
};
+static struct gpio_keys_button cpe510v2_gpio_keys[] __initdata = {
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = CPE510V2_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = CPE510V2_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
static void __init cpe_setup(u8 *mac)
{
/* Disable JTAG, enabling GPIOs 0-3 */
}
+static void __init cpe510v2_setup(void)
+{
+ void __iomem *reg;
+
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_gpio_direction_select(8, 0);
+ ath79_gpio_direction_select(9, 0);
+
+ ath79_gpio_direction_select(10, 1); /* SOUT */
+ ath79_gpio_direction_select(5, 1);
+ ath79_gpio_direction_select(6, 1);
+ ath79_gpio_direction_select(7, 1);
+
+ ath79_gpio_output_select(10, 0x16); /* SOUT */
+ ath79_gpio_output_select(5, 0x09); /* CS0 */
+ ath79_gpio_output_select(6, 0x08); /* CLK */
+ ath79_gpio_output_select(7, 0x0c); /* MOSI */
+
+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE | AR934X_GPIO_FUNC_CLK_OBS3_EN,
+ AR934X_GPIO_FUNC_CLK_OBS4_EN);
+
+ reg = (void *)KSEG1ADDR(AR71XX_GPIO_BASE + QCA953X_GPIO_REG_IN_ENABLE0);
+ /* set in register */
+ __raw_writel(0x908, reg); /* pin 8 + pin 9 = SIN + MISO */
+ /* flush write */
+ __raw_readl(reg);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510v2_leds_gpio),
+ cpe510v2_leds_gpio);
+ ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(cpe510v2_gpio_keys),
+ cpe510v2_gpio_keys);
+
+ ath79_register_m25p80(NULL);
+
+ /* ethernet */
+ ath79_register_mdio(0, 0);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_eth0_data.speed = SPEED_100;
+
+ ath79_register_eth(0);
+
+ /* wmac */
+ ath79_register_wmac(ee, mac);
+}
+
static void __init cpe510_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE510/520",
cpe510_setup);
+MIPS_MACHINE(ATH79_MACH_CPE210V2, "CPE210V2", "TP-LINK CPE210 v2",
+ cpe510v2_setup);
+
+MIPS_MACHINE(ATH79_MACH_CPE510V2, "CPE510V2", "TP-LINK CPE510 v2",
+ cpe510v2_setup);
+
MIPS_MACHINE(ATH79_MACH_WBS210, "WBS210", "TP-LINK WBS210",
wbs_setup);