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ar71xx: define NAND controller base address and register size for AR934X/QCA955x
[openwrt/svn-archive/archive.git]
/
target
/
linux
/
ar71xx
/
patches-3.3
/
521-MIPS-ath79-enable-UART-for-early_serial.patch
diff --git
a/target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch
b/target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch
index b96ea3ae580da6e89a1be7bc12a80d8687511923..489bc967380cb89bb7826d1d05e78fbfe814d16e 100644
(file)
--- a/
target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch
+++ b/
target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch
@@
-47,7
+47,7
@@
static void prom_putchar_init(void)
{
void __iomem *base;
-@@ -8
4,8 +124
,10 @@ static void prom_putchar_init(void)
+@@ -8
5,8 +125
,10 @@ static void prom_putchar_init(void)
default:
_prom_putchar = prom_putchar_dummy;