--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
-@@ -117,6 +117,10 @@ config SOC_AR934X
+@@ -116,6 +116,10 @@ config SOC_AR934X
select PCI_AR724X if PCI
def_bool n
config SOC_QCA955X
select HW_HAS_PCI
select PCI_AR724X if PCI
-@@ -156,7 +160,7 @@ config ATH79_DEV_USB
+@@ -155,7 +159,7 @@ config ATH79_DEV_USB
def_bool n
config ATH79_DEV_WMAC
else
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
-@@ -104,6 +104,8 @@ void ath79_device_reset_set(u32 mask)
+@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask)
reg = AR933X_RESET_REG_RESET_MODULE;
else if (soc_is_ar934x())
reg = AR934X_RESET_REG_RESET_MODULE;
else if (soc_is_qca955x())
reg = QCA955X_RESET_REG_RESET_MODULE;
else
-@@ -132,6 +134,8 @@ void ath79_device_reset_clear(u32 mask)
+@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask)
reg = AR933X_RESET_REG_RESET_MODULE;
else if (soc_is_ar934x())
reg = AR934X_RESET_REG_RESET_MODULE;
+ status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS);
+
+ if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) {
-+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE);
++ ath79_ddr_wb_flush(3);
+ generic_handle_irq(ATH79_IP2_IRQ(0));
+ } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) {
-+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC);
++ ath79_ddr_wb_flush(4);
+ generic_handle_irq(ATH79_IP2_IRQ(1));
+ } else {
+ spurious_interrupt();