ar71xx: disable 40Mhz refclk for QCA953x

[openwrt/staging/pepe2k.git] / target / linux / ar71xx / patches-4.9 / 621-MIPS-ath79-add-support-for-QCA956x-SoC.patch

diff --git a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
index e6eaa7123a960fa5ceab0e19b12cbff0f8043781..03bb9c31f6e41527197c810409c3003a52118df3 100644 (file)
--- a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
@@ -24,7 +24,7 @@
  config ATH79_NVRAM
 --- a/arch/mips/ath79/clock.c
 +++ b/arch/mips/ath79/clock.c
-@@ -528,6 +528,100 @@ static void __init qca955x_clocks_init(v
+@@ -524,6 +524,100 @@ static void __init qca955x_clocks_init(v
        clk_add_alias("uart", NULL, "ref", NULL);
  }
  
@@ -125,7 +125,7 @@
  void __init ath79_clocks_init(void)
  {
        if (soc_is_ar71xx())
-@@ -542,6 +636,8 @@ void __init ath79_clocks_init(void)
+@@ -538,6 +632,8 @@ void __init ath79_clocks_init(void)
                qca953x_clocks_init();
        else if (soc_is_qca955x())
                qca955x_clocks_init();
@@ -219,7 +219,7 @@
  }
 --- a/arch/mips/ath79/dev-wmac.c
 +++ b/arch/mips/ath79/dev-wmac.c
-@@ -200,6 +200,26 @@ static void qca955x_wmac_setup(void)
+@@ -195,6 +195,26 @@ static void qca955x_wmac_setup(void)
  #define AR93XX_OTP_READ_DATA \
        (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA)
  
@@ -246,7 +246,7 @@
  static bool __init
  ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data)
  {
-@@ -403,6 +423,8 @@ void __init ath79_register_wmac(u8 *cal_
+@@ -398,6 +418,8 @@ void __init ath79_register_wmac(u8 *cal_
                qca953x_wmac_setup();
        else if (soc_is_qca955x())
                qca955x_wmac_setup();