ath79: enable UART in SoC DTSI files

[openwrt/staging/jow.git] / target / linux / ath79 / dts / ar7161_ubnt_routerstation.dtsi

diff --git a/target/linux/ath79/dts/ar7161_ubnt_routerstation.dtsi b/target/linux/ath79/dts/ar7161_ubnt_routerstation.dtsi
index f21ffecc050258a2a789ffe6eafb4b893683ff2a..116bc9cfc2ffa43164e1ae417925beba26bafdb6 100644 (file)
--- a/target/linux/ath79/dts/ar7161_ubnt_routerstation.dtsi
+++ b/target/linux/ath79/dts/ar7161_ubnt_routerstation.dtsi
@@ -1,21 +1,16 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
+
+#include "ar7100.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "ar7100.dtsi"
-
 / {
-       chosen {
-               bootargs = "console=ttyS0,115200";
-       };
-
        aliases {
-               led-boot = &rf;
-               led-failsafe = &rf;
-               led-running = &rf;
-               led-upgrade = &rf;
+               led-boot = &led_rf;
+               led-failsafe = &led_rf;
+               led-running = &led_rf;
+               led-upgrade = &led_rf;
        };
 
        extosc: ref {
@@ -28,8 +23,8 @@
        leds {
                compatible = "gpio-leds";
 
-               rf: rf_green {
-                       label = "ubnt:green:rf";
+               led_rf: rf_green {
+                       label = "green:rf";
                        gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
                };
        };
@@ -60,7 +55,6 @@
 
 &spi {
        status = "okay";
-       num-cs = <1>;
 
        flash@0 {
                compatible = "jedec,spi-nor";
@@ -73,10 +67,6 @@
        };
 };
 
-&uart {
-       status = "okay";
-};
-
 &usb_phy {
        status = "okay";
 };
@@ -86,7 +76,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
 
-       usb_ochi_port: port@1 {
+       usb_ohci_port: port@1 {
                reg = <1>;
                #trigger-source-cells = <0>;
        };
@@ -97,7 +87,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
 
-       usb_echi_port: port@1 {
+       usb_ehci_port: port@1 {
                reg = <1>;
                #trigger-source-cells = <0>;
        };