pll-data = <0x1a000000 0x13000a44 0x00441099>;
pll-reg = <0x4 0x14 20>;
pll-handle = <&pll>;
- resets = <&rst 9>;
- reset-names = "mac";
- clocks = <&pll ATH79_CLK_AHB>
- clock-names = "eth";
+ resets = <&rst 9>, <&rst 22>;
+ reset-names = "mac", "mdio";
+ clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+ clock-names = "eth", "mdio";
qca,mac-idx = <0>;
};