ath79: enable UART in SoC DTSI files

[openwrt/staging/jow.git] / target / linux / ath79 / dts / ar9330_pqi_air-pen.dts

diff --git a/target/linux/ath79/dts/ar9330_pqi_air-pen.dts b/target/linux/ath79/dts/ar9330_pqi_air-pen.dts
index 2d7f79ee87a8a2088af6779248ba78ec7c0d24f3..607ee5f6c97344377176fab2e581a52432ff30eb 100644 (file)
--- a/target/linux/ath79/dts/ar9330_pqi_air-pen.dts
+++ b/target/linux/ath79/dts/ar9330_pqi_air-pen.dts
@@ -1,17 +1,15 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/dts-v1/;
+
+#include "ar9330.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "ar9330.dtsi"
-
 / {
        model = "PQI Air-Pen";
        compatible = "pqi,air-pen", "qca,ar9330";
 
        aliases {
-               serial0 = &uart;
                led-boot = &led_wlan;
                led-failsafe = &led_wlan;
                led-upgrade = &led_wlan;
@@ -21,13 +19,13 @@
                compatible = "gpio-leds";
 
                led_wlan: wlan {
-                       label = "air-pen:blue:wlan";
+                       label = "blue:wlan";
                        gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "phy0tpt";
                };
 
                wps {
-                       label = "air-pen:blue:wps";
+                       label = "blue:wps";
                        gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
                };
        };
@@ -51,10 +49,6 @@
        };
 };
 
-&uart {
-       status = "okay";
-};
-
 &usb {
        dr_mode = "host";
        status = "okay";
@@ -67,8 +61,6 @@
 &spi {
        status = "okay";
 
-       num-cs = <1>;
-
        flash@0 {
                compatible = "jedec,spi-nor";
                spi-max-frequency = <50000000>;