/*
* SRIF block
-@@ -552,4 +1007,318 @@
+@@ -552,4 +1007,322 @@
#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
+#define AR934X_ETH_CFG_RDV_DELAY BIT(16)
+#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16
++#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3
++#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18
++#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3
++#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20
+
+/*
+ * QCA953X GMAC Interface