#define ATH79_SYS_TYPE_LEN 64
-@@ -236,25 +235,21 @@ void __init plat_mem_setup(void)
+@@ -230,25 +229,21 @@ void __init plat_mem_setup(void)
else if (fw_passed_dtb)
__dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
{
struct device_node *np;
struct clk *clk;
-@@ -284,66 +279,12 @@ static void __init ath79_of_plat_time_in
+@@ -278,66 +273,12 @@ static void __init ath79_of_plat_time_in
clk_put(clk);
}