--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1725,9 +1725,11 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1726,9 +1726,11 @@ static int vc4_hdmi_cec_adap_enable(stru
((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
}
-@@ -1800,8 +1802,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1801,8 +1803,6 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
value = HDMI_READ(HDMI_CEC_CNTRL_1);
/* Set the logical address to Unregistered */
value |= VC4_HDMI_CEC_ADDR_MASK;
-@@ -1809,12 +1809,32 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1810,12 +1810,32 @@ static int vc4_hdmi_cec_init(struct vc4_
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
ret = cec_register_adapter(vc4_hdmi->cec_adap, &pdev->dev);
if (ret < 0)
-@@ -2289,6 +2309,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2290,6 +2310,7 @@ static const struct vc4_hdmi_variant bcm
PHY_LANE_CK,
},
.unsupported_odd_h_timings = true,
.init_resources = vc5_hdmi_init_resources,
.csc_setup = vc5_hdmi_csc_setup,
-@@ -2315,6 +2336,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2316,6 +2337,7 @@ static const struct vc4_hdmi_variant bcm
PHY_LANE_2,
},
.unsupported_odd_h_timings = true,