return VC4_SCALING_PPF;
else
return VC4_SCALING_TPZ;
-@@ -388,14 +388,10 @@ static int vc4_plane_setup_clipping_and_
+@@ -388,15 +388,10 @@ static int vc4_plane_setup_clipping_and_
for (i = 0; i < num_planes; i++)
vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
-- /* We don't support subpixel source positioning for scaling,
+- /*
+- * We don't support subpixel source positioning for scaling,
- * but fractional coordinates can be generated by clipping
- * so just round for now
- */
-- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1<<16);
-- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1<<16);
-- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1<<16) - vc4_state->src_x;
-- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1<<16) - vc4_state->src_y;
+- vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1 << 16);
+- vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1 << 16);
+- vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1 << 16) - vc4_state->src_x;
+- vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1 << 16) - vc4_state->src_y;
+ vc4_state->src_x = state->src.x1;
+ vc4_state->src_y = state->src.y1;
+ vc4_state->src_w[0] = state->src.x2 - vc4_state->src_x;
vc4_state->crtc_x = state->dst.x1;
vc4_state->crtc_y = state->dst.y1;
-@@ -448,7 +444,7 @@ static void vc4_write_tpz(struct vc4_pla
+@@ -449,7 +444,7 @@ static void vc4_write_tpz(struct vc4_pla
{
u32 scale, recip;
/* The specs note that while the reciprocal would be defined
* as (1<<32)/scale, ~0 is close enough.
-@@ -494,7 +490,7 @@ static u32 vc4_lbm_size(struct drm_plane
+@@ -495,7 +490,7 @@ static u32 vc4_lbm_size(struct drm_plane
if (vc4_state->x_scaling[0] == VC4_SCALING_TPZ)
pix_per_line = vc4_state->crtc_w;
else
if (!vc4_state->is_yuv) {
if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
-@@ -585,7 +581,8 @@ static void vc4_plane_calc_load(struct d
+@@ -586,7 +581,8 @@ static void vc4_plane_calc_load(struct d
for (i = 0; i < fb->format->num_planes; i++) {
/* Even if the bandwidth/plane required for a single frame is
*
*
* when downscaling, we have to read more pixels per line in
* the time frame reserved for a single line, so the bandwidth
-@@ -594,11 +591,11 @@ static void vc4_plane_calc_load(struct d
+@@ -595,11 +591,11 @@ static void vc4_plane_calc_load(struct d
* load by this number. We're likely over-estimating the read
* demand, but that's better than under-estimating it.
*/
vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w;
}
-@@ -751,7 +748,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -752,7 +748,8 @@ static int vc4_plane_mode_set(struct drm
bool mix_plane_alpha;
bool covers_screen;
u32 scl0, scl1, pitch0;
u32 hvs_format = format->hvs;
unsigned int rotation;
int ret, i;
-@@ -763,6 +761,9 @@ static int vc4_plane_mode_set(struct drm
+@@ -764,6 +761,9 @@ static int vc4_plane_mode_set(struct drm
if (ret)
return ret;
/* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
* and 4:4:4, scl1 should be set to scl0 so both channels of
* the scaler do the same thing. For YUV, the Y plane needs
-@@ -783,9 +784,11 @@ static int vc4_plane_mode_set(struct drm
+@@ -784,9 +784,11 @@ static int vc4_plane_mode_set(struct drm
DRM_MODE_REFLECT_Y);
/* We must point to the last line when Y reflection is enabled. */
switch (base_format_mod) {
case DRM_FORMAT_MOD_LINEAR:
-@@ -800,7 +803,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -801,7 +803,7 @@ static int vc4_plane_mode_set(struct drm
(i ? v_subsample : 1) *
fb->pitches[i];
(i ? h_subsample : 1) *
fb->format->cpp[i];
}
-@@ -823,7 +826,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -824,7 +826,7 @@ static int vc4_plane_mode_set(struct drm
* pitch * tile_h == tile_size * tiles_per_row
*/
u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
u32 tiles_r = tiles_w - tiles_l;
u32 tiles_t = src_y >> tile_h_shift;
/* Intra-tile offsets, which modify the base address (the
-@@ -833,7 +836,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -834,7 +836,7 @@ static int vc4_plane_mode_set(struct drm
u32 tile_y = (src_y >> 4) & 1;
u32 subtile_y = (src_y >> 2) & 3;
u32 utile_y = src_y & 3;
u32 y_off = src_y & tile_h_mask;
/* When Y reflection is requested we must set the
-@@ -929,7 +932,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -930,7 +932,7 @@ static int vc4_plane_mode_set(struct drm
* of the 12-pixels in that 128-bit word is the
* first pixel to be used
*/
u32 aligned = remaining_pixels / 12;
u32 last_bits = remaining_pixels % 12;
-@@ -951,12 +954,12 @@ static int vc4_plane_mode_set(struct drm
+@@ -952,12 +954,12 @@ static int vc4_plane_mode_set(struct drm
return -EINVAL;
}
pix_per_tile = tile_w / fb->format->cpp[0];
vc4_state->offsets[i] += param * tile_w * tile;
vc4_state->offsets[i] += src_y /
-@@ -1017,10 +1020,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -1018,10 +1020,8 @@ static int vc4_plane_mode_set(struct drm
vc4_dlist_write(vc4_state,
(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
vc4_hvs4_get_alpha_blend_mode(state) |
/* Position Word 3: Context. Written by the HVS. */
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-@@ -1078,10 +1079,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -1079,10 +1079,8 @@ static int vc4_plane_mode_set(struct drm
/* Position Word 2: Source Image Size */
vc4_state->pos2_offset = vc4_state->dlist_count;
vc4_dlist_write(vc4_state,
projects / openwrt / staging / dedeckeh.git / blobdiff