-From 0bd7afe408b2afd845f3b4971cfa641653716a12 Mon Sep 17 00:00:00 2001
+From 471248ef11464161346bd623becb383625122162 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 15:43:56 +0000
Subject: [PATCH] clk: bcm2835: add missing PLL clock dividers