pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
+ spi0 = &lsspi;
};
cpus {
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
compatible = "brcm,bcm6345-l1-intc";
gpio-controller;
#gpio-cells = <2>;
};
+
+ lsspi: spi@fffe0c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6348-spi";
+ reg = <0xfffe0c00 0x40>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+
+ };
};
};