--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3275,7 +3275,54 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3278,7 +3278,54 @@ static void mtk_hw_reset(struct mtk_eth
0x3ffffff);
}
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
ETHSYS_DMA_AG_MAP_PPE;
-@@ -3314,7 +3361,12 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3317,7 +3364,12 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
/* Set FE to PDMAv2 if necessary */
-@@ -3522,7 +3574,7 @@ static void mtk_pending_work(struct work
+@@ -3508,7 +3560,7 @@ static void mtk_pending_work(struct work
if (eth->dev->pins)
pinctrl_select_state(eth->dev->pins->p,
eth->dev->pins->default_state);
/* restart DMA and enable IRQs */
for (i = 0; i < MTK_MAC_COUNT; i++) {
-@@ -4114,7 +4166,7 @@ static int mtk_probe(struct platform_dev
+@@ -4110,7 +4162,7 @@ static int mtk_probe(struct platform_dev
eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE);
INIT_WORK(ð->pending_work, mtk_pending_work);