#define AR8XXX_MIB_WORK_DELAY 2000 /* msecs */
-struct ar8216_priv;
+struct ar8xxx_priv;
#define AR8XXX_CAP_GIGE BIT(0)
#define AR8XXX_CAP_MIB_COUNTERS BIT(1)
struct ar8xxx_chip {
unsigned long caps;
- int (*hw_init)(struct ar8216_priv *priv);
- void (*init_globals)(struct ar8216_priv *priv);
- void (*init_port)(struct ar8216_priv *priv, int port);
- void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
+ int (*hw_init)(struct ar8xxx_priv *priv);
+ void (*init_globals)(struct ar8xxx_priv *priv);
+ void (*init_port)(struct ar8xxx_priv *priv, int port);
+ void (*setup_port)(struct ar8xxx_priv *priv, int port, u32 egress,
u32 ingress, u32 members, u32 pvid);
- u32 (*read_port_status)(struct ar8216_priv *priv, int port);
- int (*atu_flush)(struct ar8216_priv *priv);
- void (*vtu_flush)(struct ar8216_priv *priv);
- void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
+ u32 (*read_port_status)(struct ar8xxx_priv *priv, int port);
+ int (*atu_flush)(struct ar8xxx_priv *priv);
+ void (*vtu_flush)(struct ar8xxx_priv *priv);
+ void (*vtu_load_vlan)(struct ar8xxx_priv *priv, u32 vid, u32 port_mask);
const struct ar8xxx_mib_desc *mib_decs;
unsigned num_mibs;
};
-struct ar8216_priv {
+struct ar8xxx_priv {
struct switch_dev dev;
+ struct mii_bus *mii_bus;
struct phy_device *phy;
- u32 (*read)(struct ar8216_priv *priv, int reg);
- void (*write)(struct ar8216_priv *priv, int reg, u32 val);
+ u32 (*read)(struct ar8xxx_priv *priv, int reg);
+ void (*write)(struct ar8xxx_priv *priv, int reg, u32 val);
const struct net_device_ops *ndo_old;
struct net_device_ops ndo;
struct mutex reg_mutex;
int mib_next_port;
u64 *mib_stats;
+ struct list_head list;
+ unsigned int use_count;
+
/* all fields below are cleared on reset */
bool vlan;
u16 vlan_id[AR8X16_MAX_VLANS];
MIB_DESC(1, AR8236_STATS_TXLATECOL, "TxLateCol"),
};
-#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
+static DEFINE_MUTEX(ar8xxx_dev_list_lock);
+static LIST_HEAD(ar8xxx_dev_list);
+
+static inline struct ar8xxx_priv *
+swdev_to_ar8xxx(struct switch_dev *swdev)
+{
+ return container_of(swdev, struct ar8xxx_priv, dev);
+}
-static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
+static inline bool ar8xxx_has_gige(struct ar8xxx_priv *priv)
{
return priv->chip->caps & AR8XXX_CAP_GIGE;
}
-static inline bool ar8xxx_has_mib_counters(struct ar8216_priv *priv)
+static inline bool ar8xxx_has_mib_counters(struct ar8xxx_priv *priv)
{
return priv->chip->caps & AR8XXX_CAP_MIB_COUNTERS;
}
-static inline bool chip_is_ar8216(struct ar8216_priv *priv)
+static inline bool chip_is_ar8216(struct ar8xxx_priv *priv)
{
return priv->chip_ver == AR8XXX_VER_AR8216;
}
-static inline bool chip_is_ar8236(struct ar8216_priv *priv)
+static inline bool chip_is_ar8236(struct ar8xxx_priv *priv)
{
return priv->chip_ver == AR8XXX_VER_AR8236;
}
-static inline bool chip_is_ar8316(struct ar8216_priv *priv)
+static inline bool chip_is_ar8316(struct ar8xxx_priv *priv)
{
return priv->chip_ver == AR8XXX_VER_AR8316;
}
-static inline bool chip_is_ar8327(struct ar8216_priv *priv)
+static inline bool chip_is_ar8327(struct ar8xxx_priv *priv)
{
return priv->chip_ver == AR8XXX_VER_AR8327;
}
}
static u32
-ar8216_mii_read(struct ar8216_priv *priv, int reg)
+ar8216_mii_read(struct ar8xxx_priv *priv, int reg)
{
- struct phy_device *phy = priv->phy;
- struct mii_bus *bus = phy->bus;
+ struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, page;
u16 lo, hi;
}
static void
-ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
+ar8216_mii_write(struct ar8xxx_priv *priv, int reg, u32 val)
{
- struct phy_device *phy = priv->phy;
- struct mii_bus *bus = phy->bus;
+ struct mii_bus *bus = priv->mii_bus;
u16 r1, r2, r3;
u16 lo, hi;
}
static void
-ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
+ar8216_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
u16 dbg_addr, u16 dbg_data)
{
- struct mii_bus *bus = priv->phy->bus;
+ struct mii_bus *bus = priv->mii_bus;
mutex_lock(&bus->mdio_lock);
bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
}
static void
-ar8216_phy_mmd_write(struct ar8216_priv *priv, int phy_addr, u16 addr, u16 data)
+ar8216_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 data)
{
- struct mii_bus *bus = priv->phy->bus;
+ struct mii_bus *bus = priv->mii_bus;
mutex_lock(&bus->mdio_lock);
bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr);
}
static u32
-ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
+ar8216_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
{
u32 v;
}
static inline void
-ar8216_reg_set(struct ar8216_priv *priv, int reg, u32 val)
+ar8216_reg_set(struct ar8xxx_priv *priv, int reg, u32 val)
{
u32 v;
}
static int
-ar8216_reg_wait(struct ar8216_priv *priv, u32 reg, u32 mask, u32 val,
+ar8216_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val,
unsigned timeout)
{
int i;
}
static int
-ar8216_mib_op(struct ar8216_priv *priv, u32 op)
+ar8216_mib_op(struct ar8xxx_priv *priv, u32 op)
{
unsigned mib_func;
int ret;
}
static int
-ar8216_mib_capture(struct ar8216_priv *priv)
+ar8216_mib_capture(struct ar8xxx_priv *priv)
{
return ar8216_mib_op(priv, AR8216_MIB_FUNC_CAPTURE);
}
static int
-ar8216_mib_flush(struct ar8216_priv *priv)
+ar8216_mib_flush(struct ar8xxx_priv *priv)
{
return ar8216_mib_op(priv, AR8216_MIB_FUNC_FLUSH);
}
static void
-ar8216_mib_fetch_port_stat(struct ar8216_priv *priv, int port, bool flush)
+ar8216_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
{
unsigned int base;
u64 *mib_stats;
}
static void
-ar8216_read_port_link(struct ar8216_priv *priv, int port,
+ar8216_read_port_link(struct ar8xxx_priv *priv, int port,
struct switch_port_link *link)
{
u32 status;
static struct sk_buff *
ar8216_mangle_tx(struct net_device *dev, struct sk_buff *skb)
{
- struct ar8216_priv *priv = dev->phy_ptr;
+ struct ar8xxx_priv *priv = dev->phy_ptr;
unsigned char *buf;
if (unlikely(!priv))
static void
ar8216_mangle_rx(struct net_device *dev, struct sk_buff *skb)
{
- struct ar8216_priv *priv;
+ struct ar8xxx_priv *priv;
unsigned char *buf;
int port, vlan;
}
static int
-ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
+ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
{
int timeout = 20;
u32 t = 0;
}
static void
-ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
+ar8216_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
{
if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
return;
}
static void
-ar8216_vtu_flush(struct ar8216_priv *priv)
+ar8216_vtu_flush(struct ar8xxx_priv *priv)
{
ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
}
static void
-ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
+ar8216_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
{
u32 op;
}
static int
-ar8216_atu_flush(struct ar8216_priv *priv)
+ar8216_atu_flush(struct ar8xxx_priv *priv)
{
int ret;
}
static u32
-ar8216_read_port_status(struct ar8216_priv *priv, int port)
+ar8216_read_port_status(struct ar8xxx_priv *priv, int port)
{
return priv->read(priv, AR8216_REG_PORT_STATUS(port));
}
static void
-ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8216_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
u32 members, u32 pvid)
{
u32 header;
}
static int
-ar8216_hw_init(struct ar8216_priv *priv)
+ar8216_hw_init(struct ar8xxx_priv *priv)
{
return 0;
}
static void
-ar8216_init_globals(struct ar8216_priv *priv)
+ar8216_init_globals(struct ar8xxx_priv *priv)
{
/* standard atheros magic */
priv->write(priv, 0x38, 0xc000050e);
}
static void
-ar8216_init_port(struct ar8216_priv *priv, int port)
+ar8216_init_port(struct ar8xxx_priv *priv, int port)
{
/* Enable port learning and tx */
priv->write(priv, AR8216_REG_PORT_CTRL(port),
};
static void
-ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8236_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
u32 members, u32 pvid)
{
ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
}
static int
-ar8236_hw_init(struct ar8216_priv *priv)
+ar8236_hw_init(struct ar8xxx_priv *priv)
{
int i;
struct mii_bus *bus;
return 0;
/* Initialize the PHYs */
- bus = priv->phy->bus;
+ bus = priv->mii_bus;
for (i = 0; i < 5; i++) {
mdiobus_write(bus, i, MII_ADVERTISE,
ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
}
static void
-ar8236_init_globals(struct ar8216_priv *priv)
+ar8236_init_globals(struct ar8xxx_priv *priv)
{
/* enable jumbo frames */
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
};
static int
-ar8316_hw_init(struct ar8216_priv *priv)
+ar8316_hw_init(struct ar8xxx_priv *priv)
{
int i;
u32 val, newval;
struct mii_bus *bus;
- val = priv->read(priv, 0x8);
+ val = priv->read(priv, AR8316_REG_POSTRIP);
if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
if (priv->port4_phy) {
/* value taken from Ubiquiti RouterStation Pro */
newval = 0x81461bea;
- printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
+ pr_info("ar8316: Using port 4 as PHY\n");
} else {
newval = 0x01261be2;
- printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
+ pr_info("ar8316: Using port 4 as switch port\n");
}
} else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
/* value taken from AVM Fritz!Box 7390 sources */
newval = 0x010e5b71;
} else {
/* no known value for phy interface */
- printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
- priv->phy->interface);
+ pr_err("ar8316: unsupported mii mode: %d.\n",
+ priv->phy->interface);
return -EINVAL;
}
if (val == newval)
goto out;
- priv->write(priv, 0x8, newval);
+ priv->write(priv, AR8316_REG_POSTRIP, newval);
+
+ if (priv->port4_phy &&
+ priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
+ /* work around for phy4 rgmii mode */
+ ar8216_phy_dbg_write(priv, 4, 0x12, 0x480c);
+ /* rx delay */
+ ar8216_phy_dbg_write(priv, 4, 0x0, 0x824e);
+ /* tx delay */
+ ar8216_phy_dbg_write(priv, 4, 0x5, 0x3d47);
+ msleep(1000);
+ }
/* Initialize the ports */
- bus = priv->phy->bus;
+ bus = priv->mii_bus;
for (i = 0; i < 5; i++) {
- if ((i == 4) && priv->port4_phy &&
- priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
- /* work around for phy4 rgmii mode */
- ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
- /* rx delay */
- ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
- /* tx delay */
- ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
- msleep(1000);
- }
-
/* initialize the port itself */
mdiobus_write(bus, i, MII_ADVERTISE,
ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
- msleep(1000);
}
+ msleep(1000);
+
out:
priv->initialized = true;
return 0;
}
static void
-ar8316_init_globals(struct ar8216_priv *priv)
+ar8316_init_globals(struct ar8xxx_priv *priv)
{
/* standard atheros magic */
priv->write(priv, 0x38, 0xc000050e);
if (cfg->txclk_delay_en)
t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
+ if (cfg->sgmii_delay_en)
+ t |= AR8327_PAD_SGMII_DELAY_EN;
+
break;
case AR8327_PAD_MAC2PHY_MII:
}
static void
-ar8327_phy_fixup(struct ar8216_priv *priv, int phy)
+ar8327_phy_fixup(struct ar8xxx_priv *priv, int phy)
{
switch (priv->chip_rev) {
case 1:
}
static int
-ar8327_hw_init(struct ar8216_priv *priv)
+ar8327_hw_init(struct ar8xxx_priv *priv)
{
struct ar8327_platform_data *pdata;
struct ar8327_led_cfg *led_cfg;
priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
}
- bus = priv->phy->bus;
+ bus = priv->mii_bus;
for (i = 0; i < AR8327_NUM_PHYS; i++) {
ar8327_phy_fixup(priv, i);
}
static void
-ar8327_init_globals(struct ar8216_priv *priv)
+ar8327_init_globals(struct ar8xxx_priv *priv)
{
u32 t;
}
static void
-ar8327_init_cpuport(struct ar8216_priv *priv)
+ar8327_config_port(struct ar8xxx_priv *priv, unsigned int port,
+ struct ar8327_port_cfg *cfg)
{
- struct ar8327_platform_data *pdata;
- struct ar8327_port_cfg *cfg;
u32 t;
- pdata = priv->phy->dev.platform_data;
- if (!pdata)
- return;
-
- cfg = &pdata->cpuport_cfg;
- if (!cfg->force_link) {
- priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU),
+ if (!cfg || !cfg->force_link) {
+ priv->write(priv, AR8327_REG_PORT_STATUS(port),
AR8216_PORT_STATUS_LINK_AUTO);
return;
}
t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
+
switch (cfg->speed) {
case AR8327_PORT_SPEED_10:
t |= AR8216_PORT_SPEED_10M;
break;
}
- priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU), t);
+ priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
}
static void
-ar8327_init_port(struct ar8216_priv *priv, int port)
+ar8327_init_port(struct ar8xxx_priv *priv, int port)
{
+ struct ar8327_platform_data *pdata;
+ struct ar8327_port_cfg *cfg;
u32 t;
- if (port == AR8216_PORT_CPU) {
- ar8327_init_cpuport(priv);
- } else {
- t = AR8216_PORT_STATUS_LINK_AUTO;
- priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
- }
+ pdata = priv->phy->dev.platform_data;
+
+ if (pdata && port == AR8216_PORT_CPU)
+ cfg = &pdata->port0_cfg;
+ else if (pdata && port == 6)
+ cfg = &pdata->port6_cfg;
+ else
+ cfg = NULL;
+
+ ar8327_config_port(priv, port, cfg);
priv->write(priv, AR8327_REG_PORT_HEADER(port), 0);
- priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0);
+ t = 1 << AR8327_PORT_VLAN0_DEF_SVID_S;
+ t |= 1 << AR8327_PORT_VLAN0_DEF_CVID_S;
+ priv->write(priv, AR8327_REG_PORT_VLAN0(port), t);
t = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH << AR8327_PORT_VLAN1_OUT_MODE_S;
priv->write(priv, AR8327_REG_PORT_VLAN1(port), t);
}
static u32
-ar8327_read_port_status(struct ar8216_priv *priv, int port)
+ar8327_read_port_status(struct ar8xxx_priv *priv, int port)
{
return priv->read(priv, AR8327_REG_PORT_STATUS(port));
}
static int
-ar8327_atu_flush(struct ar8216_priv *priv)
+ar8327_atu_flush(struct ar8xxx_priv *priv)
{
int ret;
}
static void
-ar8327_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
+ar8327_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
{
if (ar8216_wait_bit(priv, AR8327_REG_VTU_FUNC1,
AR8327_VTU_FUNC1_BUSY, 0))
}
static void
-ar8327_vtu_flush(struct ar8216_priv *priv)
+ar8327_vtu_flush(struct ar8xxx_priv *priv)
{
ar8327_vtu_op(priv, AR8327_VTU_FUNC1_OP_FLUSH, 0);
}
static void
-ar8327_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
+ar8327_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
{
u32 op;
u32 val;
}
static void
-ar8327_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8327_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
u32 members, u32 pvid)
{
u32 t;
ar8216_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
priv->vlan = !!val->value.i;
return 0;
}
ar8216_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
val->value.i = priv->vlan;
return 0;
}
static int
ar8216_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
/* make sure no invalid PVIDs get set */
static int
ar8216_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
*vlan = priv->pvid[port];
return 0;
}
ar8216_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
priv->vlan_id[val->port_vlan] = val->value.i;
return 0;
}
ar8216_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
val->value.i = priv->vlan_id[val->port_vlan];
return 0;
}
ar8216_sw_get_port_link(struct switch_dev *dev, int port,
struct switch_port_link *link)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
ar8216_read_port_link(priv, port, link);
return 0;
static int
ar8216_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
u8 ports = priv->vlan_table[val->port_vlan];
int i;
static int
ar8216_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
u8 *vt = &priv->vlan_table[val->port_vlan];
int i, j;
static int
ar8216_sw_hw_apply(struct switch_dev *dev)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
u8 portmask[AR8X16_MAX_PORTS];
int i, j;
static int
ar8216_sw_reset_switch(struct switch_dev *dev)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
int i;
mutex_lock(&priv->reg_mutex);
- memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
- offsetof(struct ar8216_priv, vlan));
+ memset(&priv->vlan, 0, sizeof(struct ar8xxx_priv) -
+ offsetof(struct ar8xxx_priv, vlan));
for (i = 0; i < AR8X16_MAX_VLANS; i++)
priv->vlan_id[i] = i;
const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
unsigned int len;
int ret;
const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
int port;
int ret;
const struct switch_attr *attr,
struct switch_val *val)
{
- struct ar8216_priv *priv = to_ar8216(dev);
+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
const struct ar8xxx_chip *chip = priv->chip;
u64 *mib_stats;
int port;
};
static int
-ar8216_id_chip(struct ar8216_priv *priv)
+ar8216_id_chip(struct ar8xxx_priv *priv)
{
u32 val;
u16 id;
int i;
- val = ar8216_mii_read(priv, AR8216_REG_CTRL);
+ val = priv->read(priv, AR8216_REG_CTRL);
if (val == ~0)
return -ENODEV;
for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
u16 t;
- val = ar8216_mii_read(priv, AR8216_REG_CTRL);
+ val = priv->read(priv, AR8216_REG_CTRL);
if (val == ~0)
return -ENODEV;
priv->chip = &ar8327_chip;
break;
default:
- printk(KERN_DEBUG
- "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
- priv->chip_ver, priv->chip_rev,
- mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
- mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
+ pr_err("ar8216: Unknown Atheros device [ver=%d, rev=%d]\n",
+ priv->chip_ver, priv->chip_rev);
return -ENODEV;
}
static void
ar8xxx_mib_work_func(struct work_struct *work)
{
- struct ar8216_priv *priv;
+ struct ar8xxx_priv *priv;
int err;
- priv = container_of(work, struct ar8216_priv, mib_work.work);
+ priv = container_of(work, struct ar8xxx_priv, mib_work.work);
mutex_lock(&priv->mib_lock);
}
static int
-ar8xxx_mib_init(struct ar8216_priv *priv)
+ar8xxx_mib_init(struct ar8xxx_priv *priv)
{
unsigned int len;
if (!priv->mib_stats)
return -ENOMEM;
- mutex_init(&priv->mib_lock);
- INIT_DELAYED_WORK(&priv->mib_work, ar8xxx_mib_work_func);
-
return 0;
}
static void
-ar8xxx_mib_start(struct ar8216_priv *priv)
+ar8xxx_mib_start(struct ar8xxx_priv *priv)
{
if (!ar8xxx_has_mib_counters(priv))
return;
}
static void
-ar8xxx_mib_cleanup(struct ar8216_priv *priv)
+ar8xxx_mib_stop(struct ar8xxx_priv *priv)
{
if (!ar8xxx_has_mib_counters(priv))
return;
cancel_delayed_work(&priv->mib_work);
- kfree(priv->mib_stats);
}
-static int
-ar8216_config_init(struct phy_device *pdev)
+static struct ar8xxx_priv *
+ar8xxx_create(void)
{
- struct ar8216_priv *priv = pdev->priv;
- struct net_device *dev = pdev->attached_dev;
- struct switch_dev *swdev;
- int ret;
-
- if (!priv) {
- priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
- if (priv == NULL)
- return -ENOMEM;
- }
+ struct ar8xxx_priv *priv;
- priv->phy = pdev;
-
- ret = ar8216_id_chip(priv);
- if (ret)
- goto err_free_priv;
-
- if (pdev->addr != 0) {
- if (ar8xxx_has_gige(priv)) {
- pdev->supported |= SUPPORTED_1000baseT_Full;
- pdev->advertising |= ADVERTISED_1000baseT_Full;
- }
+ priv = kzalloc(sizeof(struct ar8xxx_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return NULL;
- if (chip_is_ar8316(priv)) {
- /* check if we're attaching to the switch twice */
- pdev = pdev->bus->phy_map[0];
- if (!pdev) {
- kfree(priv);
- return 0;
- }
+ mutex_init(&priv->reg_mutex);
+ mutex_init(&priv->mib_lock);
+ INIT_DELAYED_WORK(&priv->mib_work, ar8xxx_mib_work_func);
- /* switch device has not been initialized, reuse priv */
- if (!pdev->priv) {
- priv->port4_phy = true;
- pdev->priv = priv;
- return 0;
- }
+ return priv;
+}
- kfree(priv);
+static void
+ar8xxx_free(struct ar8xxx_priv *priv)
+{
+ kfree(priv->mib_stats);
+ kfree(priv);
+}
- /* switch device has been initialized, reinit */
- priv = pdev->priv;
- priv->dev.ports = (AR8216_NUM_PORTS - 1);
- priv->initialized = false;
- priv->port4_phy = true;
- ar8316_hw_init(priv);
- return 0;
- }
+static struct ar8xxx_priv *
+ar8xxx_create_mii(struct mii_bus *bus)
+{
+ struct ar8xxx_priv *priv;
- kfree(priv);
- return 0;
+ priv = ar8xxx_create();
+ if (priv) {
+ priv->mii_bus = bus;
+ priv->read = ar8216_mii_read;
+ priv->write = ar8216_mii_write;
}
- if (ar8xxx_has_gige(priv))
- pdev->supported = SUPPORTED_1000baseT_Full;
- else
- pdev->supported = SUPPORTED_100baseT_Full;
- pdev->advertising = pdev->supported;
+ return priv;
+}
- mutex_init(&priv->reg_mutex);
- priv->read = ar8216_mii_read;
- priv->write = ar8216_mii_write;
+static int
+ar8xxx_probe_switch(struct ar8xxx_priv *priv)
+{
+ struct switch_dev *swdev;
+ int ret;
- pdev->priv = priv;
+ ret = ar8216_id_chip(priv);
+ if (ret)
+ return ret;
swdev = &priv->dev;
swdev->cpu_port = AR8216_PORT_CPU;
swdev->ops = &ar8216_sw_ops;
- swdev->ports = AR8216_NUM_PORTS;
if (chip_is_ar8316(priv)) {
swdev->name = "Atheros AR8316";
swdev->vlans = AR8X16_MAX_VLANS;
-
- if (priv->port4_phy) {
- /* port 5 connected to the other mac, therefore unusable */
- swdev->ports = (AR8216_NUM_PORTS - 1);
- }
+ swdev->ports = AR8216_NUM_PORTS;
} else if (chip_is_ar8236(priv)) {
swdev->name = "Atheros AR8236";
swdev->vlans = AR8216_NUM_VLANS;
} else {
swdev->name = "Atheros AR8216";
swdev->vlans = AR8216_NUM_VLANS;
+ swdev->ports = AR8216_NUM_PORTS;
}
ret = ar8xxx_mib_init(priv);
if (ret)
- goto err_free_priv;
+ return ret;
- ret = register_switch(&priv->dev, pdev->attached_dev);
- if (ret)
- goto err_cleanup_mib;
+ return 0;
+}
- printk(KERN_INFO "%s: %s switch driver attached.\n",
- pdev->attached_dev->name, swdev->name);
+static int
+ar8216_config_init(struct phy_device *phydev)
+{
+ struct ar8xxx_priv *priv = phydev->priv;
+ struct net_device *dev = phydev->attached_dev;
+ int ret;
+
+ if (WARN_ON(!priv))
+ return -ENODEV;
+
+ priv->phy = phydev;
+
+ if (phydev->addr != 0) {
+ if (chip_is_ar8316(priv)) {
+ /* switch device has been initialized, reinit */
+ priv->dev.ports = (AR8216_NUM_PORTS - 1);
+ priv->initialized = false;
+ priv->port4_phy = true;
+ ar8316_hw_init(priv);
+ return 0;
+ }
+
+ return 0;
+ }
priv->init = true;
ret = priv->chip->hw_init(priv);
if (ret)
- goto err_cleanup_mib;
+ return ret;
ret = ar8216_sw_reset_switch(&priv->dev);
if (ret)
- goto err_cleanup_mib;
-
- dev->phy_ptr = priv;
+ return ret;
/* VID fixup only needed on ar8216 */
- if (chip_is_ar8216(priv) && pdev->addr == 0) {
+ if (chip_is_ar8216(priv)) {
+ dev->phy_ptr = priv;
dev->priv_flags |= IFF_NO_IP_ALIGN;
dev->eth_mangle_rx = ar8216_mangle_rx;
dev->eth_mangle_tx = ar8216_mangle_tx;
ar8xxx_mib_start(priv);
return 0;
-
-err_cleanup_mib:
- ar8xxx_mib_cleanup(priv);
-err_free_priv:
- kfree(priv);
- return ret;
}
static int
ar8216_read_status(struct phy_device *phydev)
{
- struct ar8216_priv *priv = phydev->priv;
+ struct ar8xxx_priv *priv = phydev->priv;
struct switch_port_link link;
int ret;
return genphy_config_aneg(phydev);
}
+static const u32 ar8xxx_phy_ids[] = {
+ 0x004dd033,
+ 0x004dd041,
+ 0x004dd042,
+};
+
+static bool
+ar8xxx_phy_match(u32 phy_id)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ar8xxx_phy_ids); i++)
+ if (phy_id == ar8xxx_phy_ids[i])
+ return true;
+
+ return false;
+}
+
+static bool
+ar8xxx_is_possible(struct mii_bus *bus)
+{
+ unsigned i;
+
+ for (i = 0; i < 4; i++) {
+ u32 phy_id;
+
+ phy_id = mdiobus_read(bus, i, MII_PHYSID1) << 16;
+ phy_id |= mdiobus_read(bus, i, MII_PHYSID2);
+ if (!ar8xxx_phy_match(phy_id)) {
+ pr_debug("ar8xxx: unknown PHY at %s:%02x id:%08x\n",
+ dev_name(&bus->dev), i, phy_id);
+ return false;
+ }
+ }
+
+ return true;
+}
+
static int
-ar8216_probe(struct phy_device *pdev)
+ar8216_probe(struct phy_device *phydev)
{
- struct ar8216_priv *priv;
+ struct ar8xxx_priv *priv;
+ struct switch_dev *swdev;
int ret;
- priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
- if (priv == NULL)
- return -ENOMEM;
+ /* skip PHYs at unused adresses */
+ if (phydev->addr != 0 && phydev->addr != 4)
+ return -ENODEV;
+
+ if (!ar8xxx_is_possible(phydev->bus))
+ return -ENODEV;
- priv->phy = pdev;
+ mutex_lock(&ar8xxx_dev_list_lock);
+ list_for_each_entry(priv, &ar8xxx_dev_list, list)
+ if (priv->mii_bus == phydev->bus)
+ goto found;
- ret = ar8216_id_chip(priv);
- kfree(priv);
+ priv = ar8xxx_create_mii(phydev->bus);
+ if (priv == NULL) {
+ ret = -ENOMEM;
+ goto unlock;
+ }
+
+ ret = ar8xxx_probe_switch(priv);
+ if (ret)
+ goto free_priv;
+
+ swdev = &priv->dev;
+ swdev->alias = dev_name(&priv->mii_bus->dev);
+ ret = register_switch(swdev, NULL);
+ if (ret)
+ goto free_priv;
+
+ pr_info("%s: %s switch registered on %s\n",
+ swdev->devname, swdev->name, dev_name(&priv->mii_bus->dev));
+
+found:
+ if (phydev->addr == 0) {
+ if (ar8xxx_has_gige(priv)) {
+ phydev->supported = SUPPORTED_1000baseT_Full;
+ phydev->advertising = ADVERTISED_1000baseT_Full;
+ } else {
+ phydev->supported = SUPPORTED_100baseT_Full;
+ phydev->advertising = ADVERTISED_100baseT_Full;
+ }
+ } else {
+ if (ar8xxx_has_gige(priv)) {
+ phydev->supported |= SUPPORTED_1000baseT_Full;
+ phydev->advertising |= ADVERTISED_1000baseT_Full;
+ }
+ }
+
+ phydev->priv = priv;
+ priv->use_count++;
+ list_add(&priv->list, &ar8xxx_dev_list);
+
+ mutex_unlock(&ar8xxx_dev_list_lock);
+
+ return 0;
+
+free_priv:
+ ar8xxx_free(priv);
+unlock:
+ mutex_unlock(&ar8xxx_dev_list_lock);
return ret;
}
static void
-ar8216_remove(struct phy_device *pdev)
+ar8216_detach(struct phy_device *phydev)
{
- struct ar8216_priv *priv = pdev->priv;
- struct net_device *dev = pdev->attached_dev;
+ struct net_device *dev = phydev->attached_dev;
- if (!priv)
+ if (!dev)
return;
+ dev->phy_ptr = NULL;
dev->priv_flags &= ~IFF_NO_IP_ALIGN;
dev->eth_mangle_rx = NULL;
dev->eth_mangle_tx = NULL;
+}
- if (pdev->addr == 0)
- unregister_switch(&priv->dev);
+static void
+ar8216_remove(struct phy_device *phydev)
+{
+ struct ar8xxx_priv *priv = phydev->priv;
- ar8xxx_mib_cleanup(priv);
- kfree(priv);
+ if (WARN_ON(!priv))
+ return;
+
+ phydev->priv = NULL;
+ if (--priv->use_count > 0)
+ return;
+
+ mutex_lock(&ar8xxx_dev_list_lock);
+ list_del(&priv->list);
+ mutex_unlock(&ar8xxx_dev_list_lock);
+
+ unregister_switch(&priv->dev);
+ ar8xxx_mib_stop(priv);
+ ar8xxx_free(priv);
}
static struct phy_driver ar8216_driver = {
.features = PHY_BASIC_FEATURES,
.probe = ar8216_probe,
.remove = ar8216_remove,
+ .detach = ar8216_detach,
.config_init = &ar8216_config_init,
.config_aneg = &ar8216_config_aneg,
.read_status = &ar8216_read_status,
projects / openwrt / staging / lynxis / omap.git / blobdiff