#define RTL8366S_PHY_PAGE_MAX 7
#define RTL8366S_PHY_ADDR_MAX 31
-#define RTL8366S_CHIP_GLOBAL_CTRL_REG 0x0000
-#define RTL8366S_CHIP_CTRL_VLAN (1 << 13)
-
/* Switch Global Configuration register */
#define RTL8366S_SGCR 0x0000
#define RTL8366S_SGCR_EN_BC_STORM_CTRL BIT(0)
#define RTL8366S_SGCR_MAX_LENGTH_1536 RTL8366S_SGCR_MAX_LENGTH(0x1)
#define RTL8366S_SGCR_MAX_LENGTH_1552 RTL8366S_SGCR_MAX_LENGTH(0x2)
#define RTL8366S_SGCR_MAX_LENGTH_16000 RTL8366S_SGCR_MAX_LENGTH(0x3)
+#define RTL8366S_SGCR_EN_VLAN BIT(13)
/* Port Enable Control register */
#define RTL8366S_PECR 0x0001
static int rtl8366s_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
{
- return rtl8366_smi_rmwr(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG,
- RTL8366S_CHIP_CTRL_VLAN,
- (enable) ? RTL8366S_CHIP_CTRL_VLAN : 0);
+ return rtl8366_smi_rmwr(smi, RTL8366S_SGCR, RTL8366S_SGCR_EN_VLAN,
+ (enable) ? RTL8366S_SGCR_EN_VLAN : 0);
}
static int rtl8366s_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
u32 data;
if (attr->ofs == 1) {
- rtl8366_smi_read_reg(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG, &data);
+ rtl8366_smi_read_reg(smi, RTL8366S_SGCR, &data);
- if (data & RTL8366S_CHIP_CTRL_VLAN)
+ if (data & RTL8366S_SGCR_EN_VLAN)
val->value.i = 1;
else
val->value.i = 0;