/* SGMII */
#define VSPEC1_SGMII_CTRL 0x08
#define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */
-@@ -241,6 +248,31 @@ out:
+@@ -241,6 +248,35 @@ out:
return ret;
}
+ struct device_node *node = phydev->mdio.dev.of_node;
+ u32 led_regs[PHY_LED_NUM_LEDS];
+ int i, ret;
++ u16 val = 0xff00;
+
+ if (!IS_ENABLED(CONFIG_OF_MDIO))
+ return 0;
+ if (of_property_read_u32_array(node, "mxl,led-config", led_regs, PHY_LED_NUM_LEDS))
+ return 0;
+
++ if (of_property_read_bool(node, "mxl,led-drive-vdd"))
++ val &= 0x0fff;
++
+ /* Enable LED function handling on all ports*/
-+ phy_write(phydev, PHY_LED, 0xFF00);
++ phy_write(phydev, PHY_LED, val);
+
+ /* Write LED register values */
+ for (i = 0; i < PHY_LED_NUM_LEDS; i++) {
static int gpy_config_init(struct phy_device *phydev)
{
int ret;
-@@ -252,7 +284,10 @@ static int gpy_config_init(struct phy_de
+@@ -252,7 +288,10 @@ static int gpy_config_init(struct phy_de
/* Clear all pending interrupts */
ret = phy_read(phydev, PHY_ISTAT);