-bgmac: add supprot for BCM4707
+From 2e3759f95d3c96282c19e6f57274d816c6cf1a0e Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Sun, 10 Nov 2013 21:13:20 +0100
+Subject: [PATCH 4/5] bgmac: reset all cores on Northstar SoC
+
+On the Northstar SoC (BCM4707 and BCM53018) we have to enable all GMAC
+cores when we just want to use on. We iterate over all the cores and
+activate them.
+
+Subject: [PATCH 5/5] bgmac: add support for Northstar SoC (BCM4707, BCM53018)
+
+This adds support for the Northstar SoC. This SoC does not have a PMU in
+bcma and no register on it should be called. In addition it support 2.5
+GBit/s Ethernet to the PHY.
+
+This GMAC core is not fully working there are still problems with the
+DMA controller.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
default:
bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
}
-@@ -837,12 +840,25 @@ static void bgmac_mac_speed(struct bgmac
+@@ -837,12 +840,26 @@ static void bgmac_mac_speed(struct bgmac
static void bgmac_miiconfig(struct bgmac *bgmac)
{
+ if (ci->id == BCMA_CHIP_ID_BCM4707 ||
+ ci->id == BCMA_CHIP_ID_BCM53018) {
+ bcma_awrite32(core, BCMA_IOCTL,
-+ bcma_aread32(core, BCMA_IOCTL) | 0x44);
++ bcma_aread32(core, BCMA_IOCTL) | 0x40 |
++ BGMAC_BCMA_IOCTL_SW_CLKEN);
+ bgmac->mac_speed = SPEED_2500;
bgmac->mac_duplex = DUPLEX_FULL;
bgmac_mac_speed(bgmac);
+ } else {
-+ imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
-+ BGMAC_DS_MM_SHIFT;
++ imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
++ BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
+ if (imode == 0 || imode == 1) {
+ bgmac->mac_speed = SPEED_100;
+ bgmac->mac_duplex = DUPLEX_FULL;
}
}
-@@ -888,7 +904,8 @@ static void bgmac_chip_reset(struct bgma
-
- bcma_core_enable(core, flags);
+@@ -886,9 +903,14 @@ static void bgmac_chip_reset(struct bgma
+ flags |= BGMAC_BCMA_IOCTL_SW_RESET;
+ }
+- bcma_core_enable(core, flags);
+-
- if (core->id.rev > 2) {
-+ if (core->id.rev > 2 && ci->id != BCMA_CHIP_ID_BCM4707 &&
++ /* 3GMAC: for BCM4707, only do core reset at bgmac_probe() */
++ if (ci->id != BCMA_CHIP_ID_BCM4707)
++ bcma_core_enable(core, flags);
++
++ /* Request Misc PLL for corerev > 2 */
++ if (core->id.rev > 2 &&
++ ci->id != BCMA_CHIP_ID_BCM4707 &&
+ ci->id != BCMA_CHIP_ID_BCM53018) {
bgmac_set(bgmac, BCMA_CLKCTLST,
BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
-@@ -1026,12 +1043,15 @@ static void bgmac_enable(struct bgmac *b
+@@ -1026,12 +1048,16 @@ static void bgmac_enable(struct bgmac *b
break;
}
+ ci->id != BCMA_CHIP_ID_BCM53018) {
+ rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
+ rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
-+ bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
++ bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
++ 1000000;
+ mdp = (bp_clk * 128 / 1000) - 3;
+ rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
+ bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
}
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
-@@ -1421,6 +1441,25 @@ static int bgmac_probe(struct bcma_devic
- goto err_netdev_free;
+@@ -1366,6 +1392,7 @@ static int bgmac_probe(struct bcma_devic
+ struct bgmac *bgmac;
+ struct ssb_sprom *sprom = &core->bus->sprom;
+ u8 *mac = core->core_unit ? sprom->et1mac : sprom->et0mac;
++ struct bcma_chipinfo *ci = &core->bus->chipinfo;
+ int err;
+
+ /* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
+@@ -1404,8 +1431,16 @@ static int bgmac_probe(struct bcma_devic
}
+ bgmac->cmn = core->bus->drv_gmac_cmn.core;
+
+- bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
+- sprom->et0phyaddr;
++ /*
++ * Too much can go wrong in scanning MDC/MDIO playing "whos my phy?" .
++ * Instead, explicitly use the phy address 30.
++ */
++ if (ci->id == BCMA_CHIP_ID_BCM4707 || ci->id == BCMA_CHIP_ID_BCM53018)
++ bgmac->phyaddr = BGMAC_PHY_NOREGS;
++ else
++ bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
++ sprom->et0phyaddr;
++
+ bgmac->phyaddr &= BGMAC_PHY_MASK;
+ if (bgmac->phyaddr == BGMAC_PHY_MASK) {
+ bgmac_err(bgmac, "No PHY found\n");
+@@ -1423,6 +1458,27 @@ static int bgmac_probe(struct bcma_devic
-+ /* Northstar, take all GMAC cores out of reset */
+ bgmac_chip_reset(bgmac);
+
++ /* For Northstar, we have to take all GMAC core out of reset */
+ if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
+ core->id.id == BCMA_CHIP_ID_BCM53018) {
+ struct bcma_device *ns_core;
+ int ns_gmac;
+
++ /* Northstar has 4 GMAC cores */
+ for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
-+ /* As northstar requirement, we have to reset all GAMCs before
-+ * accessing them. et_probe() call pci_enable_device() for etx
-+ * and do si_core_reset for GAMCx only. Then the other three
-+ * GAMCs didn't reset. We do it here.
++ /* As northstar requirement, we have to reset all GAMCs
++ * before accessing one. bgmac_chip_reset() call
++ * bcma_core_enable() for this core. Then the other
++ * three GAMCs didn't reset. We do it here.
+ */
-+ ns_core = bcma_find_core_unit(core->bus, BCMA_CORE_MAC_GBIT, ns_gmac);
-+ if (!bcma_core_is_enabled(ns_core)) {
++ ns_core = bcma_find_core_unit(core->bus,
++ BCMA_CORE_MAC_GBIT,
++ ns_gmac);
++ if (ns_core && !bcma_core_is_enabled(ns_core))
+ bcma_core_enable(ns_core, 0);
-+ }
+ }
+ }
+
- bgmac_chip_reset(bgmac);
-
err = bgmac_dma_alloc(bgmac);
+ if (err) {
+ bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -189,6 +189,7 @@
projects / openwrt / svn-archive / archive.git / blobdiff