kernel: update linux 3.8 to 3.8.9
[openwrt/staging/wigyori.git] / target / linux / generic / patches-3.8 / 020-ssb_update.patch
index d3cc6f15958dabcfc047ec540fc86db698bf933d..e4d699370dc76cae696b00473c989e7aa374a7cb 100644 (file)
 +}
 --- a/drivers/ssb/driver_gpio.c
 +++ b/drivers/ssb/driver_gpio.c
-@@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct 
+@@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct
        ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
  }
  
  
  static inline u32 mips_read32(struct ssb_mipscore *mcore,
                              u16 offset)
-@@ -189,34 +209,43 @@ static void ssb_mips_serial_init(struct 
+@@ -189,34 +209,43 @@ static void ssb_mips_serial_init(struct
  static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
  {
        struct ssb_bus *bus = mcore->dev->bus;
  #endif /* CONFIG_SSB_DRIVER_MIPS */
  
  #endif /* LINUX_SSB_MIPSCORE_H_ */
---- a/drivers/net/wireless/b43/phy_n.c
-+++ b/drivers/net/wireless/b43/phy_n.c
-@@ -5165,7 +5165,8 @@ static void b43_nphy_pmu_spur_avoid(stru
- #endif
- #ifdef CONFIG_B43_SSB
-       case B43_BUS_SSB:
--              /* FIXME */
-+              ssb_pmu_spuravoid_pllupdate(&dev->dev->sdev->bus->chipco,
-+                                          avoid);
-               break;
- #endif
-       }
---- a/drivers/ssb/driver_chipcommon_pmu.c
-+++ b/drivers/ssb/driver_chipcommon_pmu.c
-@@ -675,3 +675,32 @@ u32 ssb_pmu_get_controlclock(struct ssb_
-               return 0;
-       }
- }
-+
-+void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
-+{
-+      u32 pmu_ctl = 0;
-+
-+      switch (cc->dev->bus->chip_id) {
-+      case 0x4322:
-+              ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);
-+              ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);
-+              ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);
-+              if (spuravoid == 1)
-+                      ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);
-+              else
-+                      ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);
-+              pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
-+              break;
-+      case 43222:
-+              /* TODO: BCM43222 requires updating PLLs too */
-+              return;
-+      default:
-+              ssb_printk(KERN_ERR PFX
-+                         "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
-+                         cc->dev->bus->chip_id);
-+              return;
-+      }
-+
-+      chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl);
-+}
-+EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
 --- a/drivers/ssb/pci.c
 +++ b/drivers/ssb/pci.c
 @@ -339,6 +339,21 @@ static s8 r123_extract_antgain(u8 sprom_
  }
  
  /* Revs 4 5 and 8 have partially shared layout */
---- a/include/linux/ssb/ssb_driver_chipcommon.h
-+++ b/include/linux/ssb/ssb_driver_chipcommon.h
-@@ -219,6 +219,7 @@
- #define SSB_CHIPCO_PMU_CTL                    0x0600 /* PMU control */
- #define  SSB_CHIPCO_PMU_CTL_ILP_DIV           0xFFFF0000 /* ILP div mask */
- #define  SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT     16
-+#define  SSB_CHIPCO_PMU_CTL_PLL_UPD           0x00000400
- #define  SSB_CHIPCO_PMU_CTL_NOILPONW          0x00000200 /* No ILP on wait */
- #define  SSB_CHIPCO_PMU_CTL_HTREQEN           0x00000100 /* HT req enable */
- #define  SSB_CHIPCO_PMU_CTL_ALPREQEN          0x00000080 /* ALP req enable */
-@@ -667,5 +668,6 @@ enum ssb_pmu_ldo_volt_id {
- void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
-                            enum ssb_pmu_ldo_volt_id id, u32 voltage);
- void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);
-+void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid);
- #endif /* LINUX_SSB_CHIPCO_H_ */
 --- a/include/linux/ssb/ssb_regs.h
 +++ b/include/linux/ssb/ssb_regs.h
 @@ -289,11 +289,11 @@