ipq40xx: convert to nvmem-layout

[openwrt/staging/blocktrron.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-wrtq-329acn.dts

diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
index 4694c56819145928760123af2e6b6ccac57badc8..f3c6f34bf4f55026458aa60d55d8208ddd867007 100644 (file)
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
@@ -155,24 +155,27 @@
                                label = "0:ART";
                                reg = <0x170000 0x010000>;
                                read-only;
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
 
-                               macaddr_art_0: macaddr@0{
-                                       reg = <0x0000 0x0006>;
-                               };
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
 
-                               macaddr_art_6: macaddr@6{
-                                       reg = <0x0006 0x0006>;
-                               };
+                                       macaddr_art_0: macaddr@0{
+                                               reg = <0x0000 0x0006>;
+                                       };
 
-                               precal_art_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
+                                       macaddr_art_6: macaddr@6{
+                                               reg = <0x0006 0x0006>;
+                                       };
+
+                                       precal_art_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
 
-                               precal_art_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
+                                       precal_art_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
                                };
                        };
                };