#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
---- a/drivers/pinctrl/qcom/pinctrl-msm.c
-+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
-@@ -839,11 +839,24 @@ static int msm_gpio_init(struct msm_pinc
- return ret;
- }
-
-- ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);
-- if (ret) {
-- dev_err(pctrl->dev, "Failed to add pin range\n");
-- gpiochip_remove(&pctrl->chip);
-- return ret;
-+ /*
-+ * For DeviceTree-supported systems, the gpio core checks the
-+ * pinctrl's device node for the "gpio-ranges" property.
-+ * If it is present, it takes care of adding the pin ranges
-+ * for the driver. In this case the driver can skip ahead.
-+ *
-+ * In order to remain compatible with older, existing DeviceTree
-+ * files which don't set the "gpio-ranges" property or systems that
-+ * utilize ACPI the driver has to call gpiochip_add_pin_range().
-+ */
-+ if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {
-+ ret = gpiochip_add_pin_range(&pctrl->chip,
-+ dev_name(pctrl->dev), 0, 0, chip->ngpio);
-+ if (ret) {
-+ dev_err(pctrl->dev, "Failed to add pin range\n");
-+ gpiochip_remove(&pctrl->chip);
-+ return ret;
-+ }
- }
-
- ret = gpiochip_irqchip_add(chip,