ipq40xx: 6.6: refresh kernel patches
[openwrt/staging/nbd.git] / target / linux / ipq40xx / patches-6.6 / 104-clk-fix-apss-cpu-overclocking.patch
index 2de03f7ae0aff2cc2ba59108fb3c09fd843be02a..a2d9fac1ec249ba4b63fad48e6c3803a1095a2c3 100644 (file)
@@ -44,7 +44,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/drivers/clk/qcom/gcc-ipq4019.c
 +++ b/drivers/clk/qcom/gcc-ipq4019.c
-@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe
+@@ -120,6 +120,29 @@ static const struct clk_fepll_vco gcc_fe
        .reg = 0x2f020,
  };
  
@@ -74,7 +74,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
  /*
   * Round rate function for APSS CPU PLL Clock divider.
   * It looks up the frequency table and returns the next higher frequency
-@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc
+@@ -132,7 +155,7 @@ static long clk_cpu_div_round_rate(struc
        struct clk_hw *p_hw;
        const struct freq_tbl *f;
  
@@ -83,7 +83,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
        if (!f)
                return -EINVAL;
  
-@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c
+@@ -154,7 +177,7 @@ static int clk_cpu_div_set_rate(struct c
        const struct freq_tbl *f;
        u32 mask;
  
@@ -92,7 +92,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
        if (!f)
                return -EINVAL;
  
-@@ -1304,6 +1327,7 @@ static unsigned long
+@@ -181,6 +204,7 @@ static unsigned long
  clk_cpu_div_recalc_rate(struct clk_hw *hw,
                        unsigned long parent_rate)
  {
@@ -100,7 +100,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
        struct clk_fepll *pll = to_clk_fepll(hw);
        u32 cdiv, pre_div;
        u64 rate;
-@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
+@@ -201,7 +225,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
        rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2;
        do_div(rate, pre_div);