compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
- nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+ nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
- mac-address-increment = <(1)>;
};
};
};
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
- nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+ nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
- mac-address-increment = <(2)>;
};
};
};
label = "art";
reg = <0x1200000 0x0140000>;
read-only;
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
- macaddr_art_0: macaddr@0 {
- reg = <0x0 0x6>;
- };
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
- macaddr_art_6: macaddr@6 {
- reg = <0x6 0x6>;
- };
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
- precal_art_1000: precal@1000 {
- reg = <0x1000 0x2f20>;
- };
+ macaddr_art_6: macaddr@6 {
+ compatible = "mac-base";
+ reg = <0x6 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+
+ precal_art_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
- precal_art_5000: precal@5000 {
- reg = <0x5000 0x2f20>;
+ precal_art_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
};
};
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
- nvmem-cells = <&macaddr_art_6>;
+ nvmem-cells = <&macaddr_art_6 0>;
nvmem-cell-names = "mac-address";
fixed-link {