#include "qcom-ipq8065-smb208.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
/ {
model = "Arris TR4400 v2";
pinctrl-names = "default";
led_status_red: status_red {
- label = "red:status";
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_RED>;
gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
};
led_status_blue: status_blue {
- label = "blue:status";
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
};
};
reg = <0x1200000 0x0140000>;
read-only;
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
-
- precal_ART_1000: precal@1000 {
- reg = <0x1000 0x2f20>;
- };
- precal_ART_5000: precal@5000 {
- reg = <0x5000 0x2f20>;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ precal_ART_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
+ precal_ART_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
};
};
stock_partition@1340000 {
label = "stock_rootfs";
reg = <0x1340000 0x4000000>;
+
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "extra";
+ reg = <0x0 0x4000000>;
+ };
};
partition@5340000 {
label = "0:BOOTCONFIG";
stock_partition@6400000 {
label = "stock_rootfs_1";
reg = <0x6400000 0x4000000>;
+
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "fw_env";
+ reg = <0x0 0x100000>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_fw_env_0: macaddr@0 {
+ reg = <0x00 0x6>;
+ };
+ macaddr_fw_env_6: macaddr@6 {
+ reg = <0x06 0x6>;
+ };
+ macaddr_fw_env_c: macaddr@c {
+ reg = <0x0c 0x6>;
+ };
+ macaddr_fw_env_12: macaddr@12 {
+ reg = <0x12 0x6>;
+ };
+ macaddr_fw_env_18: macaddr@18 {
+ reg = <0x18 0x6>;
+ };
+ };
+ };
+
+ partition@100000 {
+ label = "ubi";
+ reg = <0x100000 0x9b00000>;
+ };
};
stock_partition@a400000 {
label = "stock_fw_env";
label = "stock_scfgmgr";
reg = <0xaf00000 0x0100000>;
};
+ };
+ };
+};
- partition@6400000 {
- label = "fw_env";
- reg = <0x6400000 0x0100000>;
+&mdio0 {
+ status = "okay";
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
- macaddr_fw_env_0: macaddr@0 {
- reg = <0x00 0x6>;
- };
- macaddr_fw_env_6: macaddr@6 {
- reg = <0x06 0x6>;
- };
- macaddr_fw_env_c: macaddr@c {
- reg = <0x0c 0x6>;
- };
- macaddr_fw_env_12: macaddr@12 {
- reg = <0x12 0x6>;
- };
- macaddr_fw_env_18: macaddr@18 {
- reg = <0x18 0x6>;
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii";
+ tx-internal-delay-ps = <1000>;
+ rx-internal-delay-ps = <1000>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
};
};
- partition@6500000 {
- label = "ubi";
- reg = <0x6500000 0x9b00000>;
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy_port1>;
};
- partition@1340000 {
- label = "extra";
- reg = <0x1340000 0x4000000>;
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "sgmii";
+ qca,sgmii-enable-pll;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
};
- };
-};
-&mdio0 {
- status = "okay";
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
- pinctrl-0 = <&mdio0_pins>;
- pinctrl-names = "default";
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
- ethernet-phy@0 {
- reg = <0x0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x000e4 0xaa545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- >;
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+ };
};
phy7: ethernet-phy@7 {
&pcie0 {
status = "okay";
- reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
&pcie1 {
status = "okay";
- reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;