ipq806x: add hwspinlock support

[openwrt/staging/lynxis/omap.git] / target / linux / ipq806x / patches-3.18 / 115-add-pcie-aux-clk-dts.patch

diff --git a/target/linux/ipq806x/patches-3.18/115-add-pcie-aux-clk-dts.patch b/target/linux/ipq806x/patches-3.18/115-add-pcie-aux-clk-dts.patch
index 13ff921ba4222b117b62c0e365c85cd6a5cee8f1..83c5f5524770cf06936a1bd89327ee7b589f2d16 100644 (file)
--- a/target/linux/ipq806x/patches-3.18/115-add-pcie-aux-clk-dts.patch
+++ b/target/linux/ipq806x/patches-3.18/115-add-pcie-aux-clk-dts.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -336,15 +336,21 @@
+@@ -341,15 +341,21 @@
  
                        clocks = <&gcc PCIE_A_CLK>,
                                 <&gcc PCIE_H_CLK>,
@@ -26,7 +26,7 @@
  
                        status = "disabled";
                };
-@@ -377,15 +383,21 @@
+@@ -382,15 +388,21 @@
  
                        clocks = <&gcc PCIE_1_A_CLK>,
                                 <&gcc PCIE_1_H_CLK>,
@@ -52,7 +52,7 @@
  
                        status = "disabled";
                };
-@@ -418,15 +430,21 @@
+@@ -423,15 +435,21 @@
  
                        clocks = <&gcc PCIE_2_A_CLK>,
                                 <&gcc PCIE_2_H_CLK>,