/* enable PCIe clocks and resets */
val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-@@ -406,36 +393,6 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -408,36 +395,6 @@ static int qcom_pcie_init_2_1_0(struct q
val |= PHY_REFCLK_SSP_EN;
writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
/* wait for clock acquisition */
usleep_range(1000, 1500);
-@@ -448,15 +405,19 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -450,15 +407,19 @@ static int qcom_pcie_init_2_1_0(struct q
return 0;