};
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
compatible = "mips,mips4Kc";
+ reg = <0>;
};
};
mei@e116000 {
compatible = "lantiq,mei-xway";
+ reg = <0xe116000 0x400>;
interrupt-parent = <&icu0>;
interrupts = <81>;
};
ppe@e234000 {
compatible = "lantiq,ppe-ase";
+ reg = <0xe234000 0x40000>;
interrupt-parent = <&icu0>;
interrupts = <85>;
};