lantiq: fix missing otg_cap on danube platform
[openwrt/staging/jow.git] / target / linux / lantiq / patches-4.9 / 0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch
index bff603f9c8b8f7f0356c31b8617e8b5fd0bcf78a..4d184439432862e3dac1a60c36352fb2a1c88cbf 100644 (file)
@@ -23,16 +23,47 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 
 --- a/drivers/usb/dwc2/platform.c
 +++ b/drivers/usb/dwc2/platform.c
-@@ -151,7 +151,7 @@ static const struct dwc2_core_params par
+@@ -151,7 +151,38 @@ static const struct dwc2_core_params par
        .hibernation                    = -1,
  };
  
 -static const struct dwc2_core_params params_ltq = {
++static const struct dwc2_core_params params_danube = {
++      .otg_cap                        = 2,    /* non-HNP/non-SRP */
++      .otg_ver                        = -1,
++      .dma_enable                     = -1,
++      .dma_desc_enable                = -1,
++      .dma_desc_fs_enable             = -1,
++      .speed                          = -1,
++      .enable_dynamic_fifo            = -1,
++      .en_multiple_tx_fifo            = -1,
++      .host_rx_fifo_size              = -1,
++      .host_nperio_tx_fifo_size       = -1,
++      .host_perio_tx_fifo_size        = -1,
++      .max_transfer_size              = -1,
++      .max_packet_count               = -1,
++      .host_channels                  = -1,
++      .phy_type                       = -1,
++      .phy_utmi_width                 = -1,
++      .phy_ulpi_ddr                   = -1,
++      .phy_ulpi_ext_vbus              = -1,
++      .i2c_enable                     = -1,
++      .ulpi_fs_ls                     = -1,
++      .host_support_fs_ls_low_power   = -1,
++      .host_ls_low_power_phy_clk      = -1,
++      .ts_dline                       = -1,
++      .reload_ctl                     = -1,
++      .ahbcfg                         = -1,
++      .uframe_sched                   = -1,
++      .external_id_pin_ctl            = -1,
++      .hibernation                    = -1,
++};
++
 +static const struct dwc2_core_params params_ase = {
        .otg_cap                        = 2,    /* non-HNP/non-SRP */
        .otg_ver                        = -1,
        .dma_enable                     = -1,
-@@ -163,8 +163,8 @@ static const struct dwc2_core_params par
+@@ -163,8 +194,8 @@ static const struct dwc2_core_params par
        .host_rx_fifo_size              = 288,  /* 288 DWORDs */
        .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
        .host_perio_tx_fifo_size        = 96,   /* 96 DWORDs */
@@ -43,7 +74,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
        .host_channels                  = -1,
        .phy_type                       = -1,
        .phy_utmi_width                 = -1,
-@@ -176,8 +176,37 @@ static const struct dwc2_core_params par
+@@ -176,8 +207,37 @@ static const struct dwc2_core_params par
        .host_ls_low_power_phy_clk      = -1,
        .ts_dline                       = -1,
        .reload_ctl                     = -1,
@@ -83,13 +114,13 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
        .uframe_sched                   = -1,
        .external_id_pin_ctl            = -1,
        .hibernation                    = -1,
-@@ -515,8 +544,11 @@ static const struct of_device_id dwc2_of
+@@ -515,8 +575,11 @@ static const struct of_device_id dwc2_of
        { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
        { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
        { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
 -      { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
 -      { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
-+      { .compatible = "lantiq,danube-usb", .data = NULL },
++      { .compatible = "lantiq,danube-usb", .data = &params_danube },
 +      { .compatible = "lantiq,ase-usb", .data = &params_ase },
 +      { .compatible = "lantiq,arx100-usb", .data = &params_ase },
 +      { .compatible = "lantiq,xrx200-usb", .data = &params_xrx200 },