layerscape: update patches-4.9 to LSDK1712

[openwrt/staging/rmilecki.git] / target / linux / layerscape / patches-4.9 / 301-arch-support-layerscape.patch

diff --git a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
index 135333e472c6ffde423d497f24a58052898aa680..0276ebe3399189388ef72bee852b1c446dddf7c0 100644 (file)
--- a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
@@ -1,12 +1,12 @@
-From 739029f49bd9181b821298f9d27b29ce2d292967 Mon Sep 17 00:00:00 2001
+From 45e934873f9147f692dddbb61abc088f4c8059d7 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:03:52 +0800
-Subject: [PATCH] arch: support layerscape
+Date: Wed, 17 Jan 2018 14:51:29 +0800
+Subject: [PATCH 03/30] arch: support layerscape
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
 
-This is a integrated patch for layerscape arch support.
+This is an integrated patch for layerscape arch support.
 
 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
@@ -29,13 +29,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/arm/mm/ioremap.c                 |  7 ++++
  arch/arm/mm/mmu.c                     |  9 +++++
  arch/arm64/include/asm/cache.h        |  2 +-
- arch/arm64/include/asm/io.h           |  2 ++
+ arch/arm64/include/asm/io.h           | 30 +++++++++++++++++
  arch/arm64/include/asm/pci.h          |  4 +++
  arch/arm64/include/asm/pgtable-prot.h |  1 +
  arch/arm64/include/asm/pgtable.h      |  5 +++
  arch/arm64/kernel/pci.c               | 62 +++++++++++++++++++++++++++++++++++
- arch/arm64/mm/dma-mapping.c           | 23 ++++++++++---
- 15 files changed, 209 insertions(+), 8 deletions(-)
+ arch/arm64/mm/dma-mapping.c           |  6 ++++
+ 15 files changed, 225 insertions(+), 3 deletions(-)
 
 --- a/arch/arm/include/asm/delay.h
 +++ b/arch/arm/include/asm/delay.h
@@ -284,6 +284,41 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +                                                __pgprot(PROT_NORMAL_NS))
  #define iounmap                               __iounmap
  
+ /*
+@@ -184,6 +186,34 @@ extern void __iomem *ioremap_cache(phys_
+ #define iowrite32be(v,p)      ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
+ #define iowrite64be(v,p)      ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); })
+ 
++/* access ports */
++#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
++#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
++
++#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
++#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
++
++#define setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
++#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
++
++/* Clear and set bits in one shot.  These macros can be used to clear and
++ * set multiple bits in a register using a single read-modify-write.  These
++ * macros can also be used to set a multiple-bit bit pattern using a mask,
++ * by specifying the mask in the 'clear' parameter and the new bit pattern
++ * in the 'set' parameter.
++ */
++
++#define clrsetbits_be32(addr, clear, set) \
++      iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le32(addr, clear, set) \
++      iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_be16(addr, clear, set) \
++      iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le16(addr, clear, set) \
++      iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_8(addr, clear, set) \
++      iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
++
+ #include <asm-generic/io.h>
+ 
  /*
 --- a/arch/arm64/include/asm/pci.h
 +++ b/arch/arm64/include/asm/pci.h