u32 reg_ctrl_default;
struct clk *clk_ipg;
-@@ -890,7 +890,8 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -892,7 +892,8 @@ static irqreturn_t flexcan_irq(int irq,
struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv->regs;
irqreturn_t handled = IRQ_NONE;
enum can_state last_state = priv->can.state;
/* reception interrupt */
-@@ -924,10 +925,10 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -926,10 +927,10 @@ static irqreturn_t flexcan_irq(int irq,
}
}
u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl);
handled = IRQ_HANDLED;
-@@ -939,7 +940,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -941,7 +942,7 @@ static irqreturn_t flexcan_irq(int irq,
/* after sending a RTR frame MB is in RX mode */
priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
&priv->tx_mb->can_ctrl);
priv->write(upper_32_bits(reg_imask), ®s->imask2);
priv->write(lower_32_bits(reg_imask), ®s->imask1);
enable_irq(dev->irq);
-@@ -1318,6 +1319,7 @@ static int flexcan_open(struct net_devic
+@@ -1321,6 +1322,7 @@ static int flexcan_open(struct net_devic
flexcan_get_mb(priv, FLEXCAN_TX_MB_RESERVED_OFF_FIFO);
priv->tx_mb_idx = priv->mb_count - 1;
priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);