mediatek: filogic: consolidate adc '32k' clock

[openwrt/staging/dedeckeh.git] / target / linux / mediatek / files-5.15 / arch / arm64 / boot / dts / mediatek / mt7986a.dtsi

diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index be82acd204c9c934ca559497ba6c9f4a8393607e..060b88f9dd3eea0802be83f8505ecf5c6b23a19b 100644 (file)
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -297,9 +297,8 @@
                        compatible = "mediatek,mt7986-auxadc",
                                     "mediatek,mt7622-auxadc";
                        reg = <0 0x1100d000 0 0x1000>;
-                       clocks = <&infracfg CLK_INFRA_ADC_26M_CK>,
-                                <&infracfg CLK_INFRA_ADC_FRC_CK>;
-                       clock-names = "main", "32k";
+                       clocks = <&infracfg CLK_INFRA_ADC_26M_CK>;
+                       clock-names = "main";
                        #io-channel-cells = <1>;
                };
 
@@ -349,9 +348,8 @@
                        reg = <0 0x1100c800 0 0x800>;
                        interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&infracfg CLK_INFRA_THERM_CK>,
-                                <&infracfg CLK_INFRA_ADC_26M_CK>,
-                                <&infracfg CLK_INFRA_ADC_FRC_CK>;
-                       clock-names = "therm", "auxadc", "adc_32k";
+                                <&infracfg CLK_INFRA_ADC_26M_CK>;
+                       clock-names = "therm", "auxadc";
                        mediatek,auxadc = <&auxadc>;
                        mediatek,apmixedsys = <&apmixedsys>;
                        nvmem-cells = <&thermal_calibration>;