kernel: bump 4.14 to 4.14.161

[openwrt/staging/wigyori.git] / target / linux / mediatek / patches-4.14 / 0157-mmc-mediatek-add-support-of-source_cg-clock.patch

diff --git a/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch b/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch
index 8a183ceb54d57c72c3e5afde570d1cbab1a4da5b..b02a9c161724373a5fe806e6e3bdffb24b279870 100644 (file)
--- a/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch
+++ b/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch
@@ -15,7 +15,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
 
 --- a/drivers/mmc/host/mtk-sd.c
 +++ b/drivers/mmc/host/mtk-sd.c
-@@ -372,6 +372,7 @@ struct msdc_host {
+@@ -374,6 +374,7 @@ struct msdc_host {
  
        struct clk *src_clk;    /* msdc source clock */
        struct clk *h_clk;      /* msdc h_clk */
@@ -23,7 +23,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
        u32 mclk;               /* mmc subsystem clock frequency */
        u32 src_clk_freq;       /* source clock frequency */
        u32 sclk;               /* SD/MS bus clock frequency */
-@@ -616,6 +617,7 @@ static void msdc_set_timeout(struct msdc
+@@ -618,6 +619,7 @@ static void msdc_set_timeout(struct msdc
  
  static void msdc_gate_clock(struct msdc_host *host)
  {
@@ -31,7 +31,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
        clk_disable_unprepare(host->src_clk);
        clk_disable_unprepare(host->h_clk);
  }
-@@ -624,6 +626,7 @@ static void msdc_ungate_clock(struct msd
+@@ -626,6 +628,7 @@ static void msdc_ungate_clock(struct msd
  {
        clk_prepare_enable(host->h_clk);
        clk_prepare_enable(host->src_clk);
@@ -39,7 +39,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
        while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB))
                cpu_relax();
  }
-@@ -692,6 +695,15 @@ static void msdc_set_mclk(struct msdc_ho
+@@ -694,6 +697,15 @@ static void msdc_set_mclk(struct msdc_ho
                        sclk = (host->src_clk_freq >> 2) / div;
                }
        }
@@ -55,7 +55,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
        if (host->dev_comp->clk_div_bits == 8)
                sdr_set_field(host->base + MSDC_CFG,
                              MSDC_CFG_CKMOD | MSDC_CFG_CKDIV,
-@@ -700,10 +712,14 @@ static void msdc_set_mclk(struct msdc_ho
+@@ -702,10 +714,14 @@ static void msdc_set_mclk(struct msdc_ho
                sdr_set_field(host->base + MSDC_CFG,
                              MSDC_CFG_CKMOD_EXTRA | MSDC_CFG_CKDIV_EXTRA,
                              (mode << 12) | div);
@@ -71,7 +71,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
        host->sclk = sclk;
        host->mclk = hz;
        host->timing = timing;
-@@ -1822,6 +1838,11 @@ static int msdc_drv_probe(struct platfor
+@@ -1825,6 +1841,11 @@ static int msdc_drv_probe(struct platfor
                goto host_free;
        }