mediatek: fix mt7622-rfb1 board support

[openwrt/staging/rmilecki.git] / target / linux / mediatek / patches-5.4 / 0005-dts-mt7622-add-gsw.patch

diff --git a/target/linux/mediatek/patches-5.4/0005-dts-mt7622-add-gsw.patch b/target/linux/mediatek/patches-5.4/0005-dts-mt7622-add-gsw.patch
index 872854fd8c2dd152df655db10439815a9a23b2e9..906b661538e2e2d86da397d058157be71c8e9687 100644 (file)
--- a/target/linux/mediatek/patches-5.4/0005-dts-mt7622-add-gsw.patch
+++ b/target/linux/mediatek/patches-5.4/0005-dts-mt7622-add-gsw.patch
@@ -63,17 +63,15 @@
   *
   * SPDX-License-Identifier: (GPL-2.0 OR MIT)
   */
-@@ -14,8 +13,8 @@
+@@ -14,7 +13,7 @@
  #include "mt6380.dtsi"
  
  / {
 -      model = "MediaTek MT7622 RFB1 board";
--      compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
 +      model = "MT7622_MT7531 RFB";
-+      compatible = "bananapi,bpi-r64", "mediatek,mt7622";
+       compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
  
        aliases {
-               serial0 = &uart0;
 @@ -23,7 +22,7 @@
  
        chosen {
@@ -83,7 +81,7 @@
        };
  
        cpus {
-@@ -40,23 +39,45 @@
+@@ -40,23 +39,38 @@
  
        gpio-keys {
                compatible = "gpio-keys";
@@ -93,24 +91,17 @@
                        label = "factory";
                        linux,code = <BTN_0>;
 -                      gpios = <&pio 0 0>;
-+                      gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
++                      gpios = <&pio 0 GPIO_ACTIVE_LOW>;
                };
  
                wps {
                        label = "wps";
                        linux,code = <KEY_WPS_BUTTON>;
 -                      gpios = <&pio 102 0>;
-+                      gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
++                      gpios = <&pio 102 GPIO_ACTIVE_LOW>;
 +              };
 +      };
 +
-+      gsw: gsw@0 {
-+                compatible = "mediatek,mt753x";
-+                mediatek,ethsys = <&ethsys>;
-+                #address-cells = <1>;
-+                #size-cells = <0>;
-+        };
-+
 +      leds {
 +              compatible = "gpio-leds";
 +
@@ -133,7 +124,7 @@
        };
  
        reg_1p8v: regulator-1p8v {
-@@ -101,27 +122,67 @@
+@@ -101,23 +115,82 @@
  };
  
  &eth {
@@ -169,48 +160,61 @@
 +      mdio: mdio-bus {
                #address-cells = <1>;
                #size-cells = <0>;
--
+ 
 -              phy5: ethernet-phy@5 {
 -                      reg = <5>;
 -                      phy-mode = "sgmii";
--              };
-       };
- };
- 
-+&gsw {
-+        mediatek,mdio = <&mdio>;
-+        mediatek,portmap = "llllw";
-+        mediatek,mdio_master_pinmux = <0>;
-+        reset-gpios = <&pio 54 0>;
-+        interrupt-parent = <&pio>;
-+        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
-+        status = "okay";
++              switch@0 {
++                      compatible = "mediatek,mt7531";
++                      reg = <0>;
++                      reset-gpios = <&pio 54 0>;
 +
-+        port5: port@5 {
-+                compatible = "mediatek,mt753x-port";
-+                reg = <5>;
-+                phy-mode = "rgmii";
-+                fixed-link {
-+                        speed = <1000>;
-+                        full-duplex;
-+                };
-+        };
++                      ports {
++                              #address-cells = <1>;
++                              #size-cells = <0>;
 +
-+        port6: port@6 {
-+                compatible = "mediatek,mt753x-port";
-+                reg = <6>;
-+                phy-mode = "sgmii";
-+                fixed-link {
-+                        speed = <2500>;
-+                        full-duplex;
-+                };
-+        };
-+};    
++                              port@0 {
++                                      reg = <0>;
++                                      label = "lan1";
++                              };
 +
- &i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
-@@ -185,15 +246,28 @@
++                              port@1 {
++                                      reg = <1>;
++                                      label = "lan2";
++                              };
++
++                              port@2 {
++                                      reg = <2>;
++                                      label = "lan3";
++                              };
++
++                              port@3 {
++                                      reg = <3>;
++                                      label = "lan4";
++                              };
++
++                              port@4 {
++                                      reg = <4>;
++                                      label = "wan";
++                              };
++
++                              port@6 {
++                                      reg = <6>;
++                                      label = "cpu";
++                                      ethernet = <&gmac0>;
++                                      phy-mode = "2500base-x";
++
++                                      fixed-link {
++                                              speed = <2500>;
++                                              full-duplex;
++                                              pause;
++                                      };
++                              };
++                      };
+               };
+       };
+ };
+@@ -185,15 +258,28 @@
  
  &pcie {
        pinctrl-names = "default";
@@ -240,7 +244,7 @@
        /* eMMC is shared pin with parallel NAND */
        emmc_pins_default: emmc-pins-default {
                mux {
-@@ -460,11 +534,11 @@
+@@ -460,11 +546,11 @@
  };
  
  &sata {