#size-cells = <1>;
compatible = "ralink,mt7620a-soc";
+ aliases {
+ spi0 = &spi0;
+ spi1 = &spi1;
+ serial0 = &uartlite;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
};
- aliases {
- spi0 = &spi0;
- spi1 = &spi1;
- serial0 = &uartlite;
- };
-
palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
gpio-controller;
#gpio-cells = <2>;
+ ngpios = <24>;
ralink,gpio-base = <0>;
- ralink,num-gpios = <24>;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
gpio-controller;
#gpio-cells = <2>;
+ ngpios = <16>;
ralink,gpio-base = <24>;
- ralink,num-gpios = <16>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
gpio-controller;
#gpio-cells = <2>;
+ ngpios = <32>;
ralink,gpio-base = <40>;
- ralink,num-gpios = <32>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
gpio-controller;
#gpio-cells = <2>;
+ ngpios = <1>;
ralink,gpio-base = <72>;
- ralink,num-gpios = <1>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
};
};
+ pa_gpio_pins: pa_gpio {
+ pa {
+ groups = "pa";
+ function = "gpio";
+ };
+ };
+
sdhci_pins: sdhci {
sdhci {
groups = "nd_sd";