serial0 = &uartlite;
};
- palmbus@10000000 {
+ palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
+ sysc: sysc@0 {
compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
reg = <0x0 0x100>;
};
- timer@100 {
+ timer: timer@100 {
compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
interrupts = <1>;
};
- watchdog@120 {
+ watchdog: watchdog@120 {
compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
interrupts = <2>;
};
- memc@300 {
+ memc: memc@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
interrupts = <3>;
};
- uart@500 {
+ uart: uart@500 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
status = "disabled";
};
- i2c@900 {
- compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
+ i2c: i2c@900 {
+ compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
pinctrl-0 = <&i2c_pins>;
};
- i2s@a00 {
- compatible = "ralink,mt7620a-i2s";
+ i2s: i2s@a00 {
+ compatible = "mediatek,mt7620-i2s";
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
interrupt-parent = <&intc>;
interrupts = <10>;
+ txdma-req = <2>;
+ rxdma-req = <3>;
+
dmas = <&gdma 4>,
- <&gdma 5>;
+ <&gdma 6>;
dma-names = "tx", "rx";
status = "disabled";
reset-names = "spi";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
pinctrl-0 = <&uartlite_pins>;
};
- systick@d00 {
+ systick: systick@d00 {
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
interrupts = <7>;
};
- pcm@2000 {
+ pcm: pcm@2000 {
compatible = "ralink,mt7620a-pcm";
reg = <0x2000 0x800>;
};
gdma: gdma@2800 {
- compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
+ compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
};
};
- pinctrl {
+ pinctrl: pinctrl {
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
};
};
+ gpio_i2s_pins: gpio_i2s {
+ gpio_i2s {
+ ralink,group = "uartf";
+ ralink,function = "gpio i2s";
+ };
+ };
+
spi_pins: spi {
spi {
ralink,group = "spi";
#reset-cells = <1>;
};
+ clkctrl: clkctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
usbphy: usbphy {
compatible = "mediatek,mt7620-usbphy";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
+
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
};
- ethernet@10100000 {
+ ethernet: ethernet@10100000 {
compatible = "mediatek,mt7620-eth";
reg = <0x10100000 0x10000>;
interrupts = <17>;
};
- sdhci@10130000 {
+ sdhci: sdhci@10130000 {
compatible = "ralink,mt7620-sdhci";
reg = <0x10130000 0x4000>;
status = "disabled";
};
- ehci@101c0000 {
+ ehci: ehci@101c0000 {
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
status = "disabled";
};
- ohci@101c1000 {
+ ohci: ohci@101c1000 {
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
status = "disabled";
};
- pcie@10140000 {
+ pcie: pcie@10140000 {
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
resets = <&rstctrl 26>;
reset-names = "pcie0";
+ clocks = <&clkctrl 26>;
+ clock-names = "pcie0";
+
interrupt-parent = <&cpuintc>;
interrupts = <4>;
};
};
- wmac@10180000 {
+ wmac: wmac@10180000 {
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
reg = <0x10180000 0x40000>;