#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
/ {
compatible = "lava,lr-25g001", "ralink,mt7620a-soc";
wifi2g {
label = "green:wifi2g";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
};
wifi5g {
label = "green:wifi5g";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
};
};
};
partition@10000 {
- compatible = "amit,jimage";
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <IH_MAGIC_OKLI>;
+ openwrt,offset = <0x10000>;
label = "firmware";
reg = <0x10000 0xfe0000>;
};
label = "config";
reg = <0xff0000 0x10000>;
read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_config_e08a: eeprom@e08a {
+ reg = <0xe08a 0x200>;
+ };
+
+ macaddr_config_e07e: macaddr@e07e {
+ compatible = "mac-base";
+ reg = <0xe07e 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
};
};
};
mdio-bus {
status = "okay";
- mediatek,mdio-mode = <1>;
- phy0: ethernet-phy@0 {
+ ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x87300000 /* PORT0 PAD MODE CTRL */
0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
+ 0x80 0x00001200 /* PORT1_STATUS */
+ 0x84 0x00001200 /* PORT2_STATUS */
+ 0x88 0x00001200 /* PORT3_STATUS */
+ 0x8c 0x00001200 /* PORT4_STATUS */
+ 0x90 0x00001200 /* PORT5_STATUS */
0x94 0x00000000 /* PORT6_STATUS */
>;
};
-
- phy1: ethernet-phy@1 {
- reg = <1>;
- phy-mode = "rgmii";
- };
-
- phy2: ethernet-phy@2 {
- reg = <2>;
- phy-mode = "rgmii";
- };
-
- phy3: ethernet-phy@3 {
- reg = <3>;
- phy-mode = "rgmii";
- };
-
- phy4: ethernet-phy@4 {
- reg = <4>;
- phy-mode = "rgmii";
- };
};
};
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
- mtd-mac-address = <&config 0xe07e>;
- mtd-mac-address-increment = <(2)>;
- mediatek,mtd-eeprom = <&config 0xe08a>;
+ nvmem-cells = <&eeprom_config_e08a>, <&macaddr_config_e07e 2>;
+ nvmem-cell-names = "eeprom", "mac-address";
};
};