-// SPDX-License-Identifier: GPL-2.0
-
-/dts-v1/;
+// SPDX-License-Identifier: GPL-2.0-only
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
/ {
compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
compatible = "gpio-leds";
led_wps: wps {
- label = "bl-w1200:green:wps";
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
};
read-only;
};
- factory: partition@40000 {
+ partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom@0 {
+ reg = <0x0 0x200>;
+ };
+
+ eeprom_factory_8000: eeprom@8000 {
+ reg = <0x8000 0x200>;
+ };
+
+ macaddr_factory_28: macaddr@28 {
+ reg = <0x28 0x6>;
+ };
+ };
};
partition@50000 {
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins &mdio_pins>;
- mtd-mac-address = <&factory 0x28>;
+ nvmem-cells = <&macaddr_factory_28>;
+ nvmem-cell-names = "mac-address";
mediatek,portmap = "wllll";
};
};
+&gsw {
+ mediatek,ephy-base = /bits/ 8 <12>;
+};
+
&wmac {
- ralink,mtd-eeprom = <&factory 0x0>;
+ nvmem-cells = <&eeprom_factory_0>;
+ nvmem-cell-names = "eeprom";
};
&pcie {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
+ nvmem-cells = <&eeprom_factory_8000>;
+ nvmem-cell-names = "eeprom";
led {
led-sources = <2>;