-/dts-v1/;
-
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
compatible = "gpio-leds";
sys1 {
- label = "zbt-ape522ii:green:sys1";
+ label = "green:sys1";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
sys2 {
- label = "zbt-ape522ii:green:sys2";
+ label = "green:sys2";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
sys3 {
- label = "zbt-ape522ii:green:sys3";
+ label = "green:sys3";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
sys4 {
- label = "zbt-ape522ii:green:sys4";
+ label = "green:sys4";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wlan2g4 {
- label = "zbt-ape522ii:green:wlan2g4";
+ label = "green:wlan2g4";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
};
};
-&gpio0 {
- status = "okay";
-};
-
-&gpio1 {
- status = "okay";
-};
-
-&gpio2 {
- status = "okay";
-};
-
&gpio3 {
status = "okay";
};
read-only;
};
- factory: partition@40000 {
+ partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom@0 {
+ reg = <0x0 0x200>;
+ };
+
+ eeprom_factory_8000: eeprom@8000 {
+ reg = <0x8000 0x200>;
+ };
+
+ macaddr_factory_4: macaddr@4 {
+ reg = <0x4 0x6>;
+ };
+ };
};
partition@50000 {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
- mtd-mac-address = <&factory 0x4>;
+ nvmem-cells = <&macaddr_factory_4>;
+ nvmem-cell-names = "mac-address";
mediatek,portmap = "llllw";
};
&wmac {
- ralink,mtd-eeprom = <&factory 0x0>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;
+ pinctrl-1 = <&pa_gpio_pins>;
+ nvmem-cells = <&eeprom_factory_0>;
+ nvmem-cell-names = "eeprom";
};
&pcie {
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
+ nvmem-cells = <&eeprom_factory_8000>;
+ nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};