clock-output-names = "cpu", "bus";
};
- cpuclock: cpuclock {
- #clock-cells = <0>;
- compatible = "fixed-clock";
-
- /* FIXME: there should be way to detect this */
- clock-frequency = <880000000>;
- };
-
sysclock: sysclock {
#clock-cells = <0>;
compatible = "fixed-clock";
compatible = "mtk,mt7621-gpio";
reg = <0x600 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
+
gpio0: bank@0 {
reg = <0>;
compatible = "mtk,mt7621-gpio-bank";
status = "disabled";
};
- systick: systick@d00 {
+ systick: systick@500 {
compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
- reg = <0xd00 0x10>;
+ reg = <0x500 0x10>;
resets = <&rstctrl 28>;
reset-names = "intc";
compatible = "ns16550a";
reg = <0xc00 0x100>;
- clocks = <&sysclock>;
clock-frequency = <50000000>;
interrupt-parent = <&gic>;
no-loopback-test;
};
+ uartlite2: uartlite2@d00 {
+ compatible = "ns16550a";
+ reg = <0xd00 0x100>;
+
+ clock-frequency = <50000000>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+
+ status = "disabled";
+ };
+
+ uartlite3: uartlite3@e00 {
+ compatible = "ns16550a";
+ reg = <0xe00 0x100>;
+
+ clock-frequency = <50000000>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+
+ status = "disabled";
+ };
+
spi0: spi@b00 {
status = "disabled";
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
- clocks = <&sysclock>;
+ clocks = <&pll MT7621_CLK_BUS>;
resets = <&rstctrl 18>;
reset-names = "spi";
state_default: pinctrl0 {
};
- i2c_pins: i2c {
- i2c {
+ i2c_pins: i2c_pins {
+ i2c_pins {
ralink,group = "i2c";
ralink,function = "i2c";
};
};
- spi_pins: spi {
- spi {
+ spi_pins: spi_pins {
+ spi_pins {
ralink,group = "spi";
ralink,function = "spi";
};
timer {
compatible = "mti,gic-timer";
interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
- clocks = <&cpuclock>;
+ clocks = <&pll MT7621_CLK_CPU>;
};
};