ramips: mt7621-dts: remove obsolete switch node

[openwrt/staging/thess.git] / target / linux / ramips / dts / mt7621.dtsi

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index cc387519e4f42f6c6f6e1053ef393661208b32af..779d8c4da05956a61c159ccda71a1ee9f1a8317d 100644 (file)
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -1,3 +1,5 @@
+/dts-v1/;
+
 #include <dt-bindings/interrupt-controller/mips-gic.h>
 #include <dt-bindings/clock/mt7621-clk.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -7,6 +9,10 @@
        #size-cells = <1>;
        compatible = "mediatek,mt7621-soc";
 
+       aliases {
+               serial0 = &uartlite;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -31,8 +37,8 @@
                compatible = "mti,cpu-interrupt-controller";
        };
 
-       aliases {
-               serial0 = &uartlite;
+       chosen {
+               bootargs = "console=ttyS0,57600";
        };
 
        pll: pll {
@@ -50,10 +56,10 @@
                clock-frequency = <50000000>;
        };
 
-       palmbus: palmbus@1E000000 {
+       palmbus: palmbus@1e000000 {
                compatible = "palmbus";
-               reg = <0x1E000000 0x100000>;
-               ranges = <0x0 0x1E000000 0x0FFFFF>;
+               reg = <0x1e000000 0x100000>;
+               ranges = <0x0 0x1e000000 0x0fffff>;
 
                #address-cells = <1>;
                #size-cells = <1>;
@@ -135,16 +141,6 @@
                        reg = <0x5000 0x1000>;
                };
 
-               cpc: cpc@1fbf0000 {
-                       compatible = "mtk,mt7621-cpc";
-                       reg = <0x1fbf0000 0x8000>;
-               };
-
-               mc: mc@1fbf8000 {
-                       compatible = "mtk,mt7621-mc";
-                       reg = <0x1fbf8000 0x8000>;
-               };
-
                uartlite: uartlite@c00 {
                        compatible = "ns16550a";
                        reg = <0xc00 0x100>;
@@ -221,7 +217,7 @@
                        reset-names = "dma";
 
                        interrupt-parent = <&gic>;
-                       interrupts = <0 13 4>;
+                       interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
 
                        #dma-cells = <1>;
                        #dma-channels = <16>;
@@ -238,7 +234,7 @@
                        reset-names = "hsdma";
 
                        interrupt-parent = <&gic>;
-                       interrupts = <0 11 4>;
+                       interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
 
                        #dma-cells = <1>;
                        #dma-channels = <1>;
@@ -349,11 +345,11 @@
                #clock-cells = <1>;
        };
 
-       sdhci: sdhci@1E130000 {
+       sdhci: sdhci@1e130000 {
                status = "disabled";
 
                compatible = "ralink,mt7620-sdhci";
-               reg = <0x1E130000 0x4000>;
+               reg = <0x1e130000 0x4000>;
 
                interrupt-parent = <&gic>;
                interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
@@ -362,10 +358,9 @@
                pinctrl-0 = <&sdhci_pins>;
        };
 
-       xhci: xhci@1E1C0000 {
+       xhci: xhci@1e1c0000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               status = "okay";
 
                compatible = "mediatek,mt8173-xhci";
                reg = <0x1e1c0000 0x1000
@@ -414,13 +409,33 @@
                };
        };
 
+       nficlock: nficlock {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+
+               clock-frequency = <125000000>;
+       };
+
+       cpc: cpc@1fbf0000 {
+               compatible = "mti,mips-cpc";
+               reg = <0x1fbf0000 0x8000>;
+       };
+
+       mc: mc@1fbf8000 {
+               compatible = "mti,mips-cdmm";
+               reg = <0x1fbf8000 0x8000>;
+       };
+
        nand: nand@1e003000 {
                status = "disabled";
 
-               compatible = "mtk,mt7621-nand";
-               bank-width = <2>;
+               compatible = "mediatek,mt7621-nfc";
                reg = <0x1e003000 0x800
                        0x1e003800 0x800>;
+               reg-names = "nfi", "ecc";
+
+               clocks = <&nficlock>;
+               clock-names = "nfi_clk";
        };
 
        ethsys: syscon@1e000000 {
@@ -531,13 +546,6 @@
                };
        };
 
-       gsw: gsw@1e110000 {
-               compatible = "mediatek,mt7621-gsw";
-               reg = <0x1e110000 0x8000>;
-               interrupt-parent = <&gic>;
-               interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
-       };
-
        pcie: pcie@1e140000 {
                compatible = "mediatek,mt7621-pci";
                reg = <0x1e140000 0x100     /* host-pci bridge registers */
@@ -558,11 +566,10 @@
                        0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
                >;
 
-               #interrupt-cells = <1>;
-               interrupt-map-mask = <0xF0000 0 0 1>;
-               interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
-                               <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
-                               <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-parent = <&gic>;
+               interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
+                               GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
+                               GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
 
                status = "disabled";