RT305X_SOC_UNKNOWN = 0,
RT305X_SOC_RT3050,
RT305X_SOC_RT3052,
+ RT305X_SOC_RT3350,
RT305X_SOC_RT3352,
+ RT305X_SOC_RT5350,
};
extern enum rt305x_soc_type rt305x_soc;
return soc_is_rt3050() || soc_is_rt3052();
}
+static inline int soc_is_rt3350(void)
+{
+ return rt305x_soc == RT305X_SOC_RT3350;
+}
+
static inline int soc_is_rt3352(void)
{
return rt305x_soc == RT305X_SOC_RT3352;
}
+static inline int soc_is_rt5350(void)
+{
+ return rt305x_soc == RT305X_SOC_RT5350;
+}
+
#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
+#define RT3352_MEM_SIZE_MIN (2 * 1024 * 1024)
+#define RT3352_MEM_SIZE_MAX (256 * 1024 * 1024)
+
#define RT305X_CPU_IRQ_BASE 0
#define RT305X_INTC_IRQ_BASE 8
#define RT305X_INTC_IRQ_COUNT 32